FPAA based on integration of CMOS and nanojunction devices for neuromorphic applications

Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering

Volumn 3 LNICST, Issue , 2009, Pages 44-48

  Liu, Ming ^a   Yu, Hua ^b   Wang, Wei ^b  

^a INSTITUTE OF MICROELECTRONICS   (China)

^b STATE UNIVERSITY OF NEW YORK   (United States)

Author keywords

Field programmable analog arrays (FPAA); Nanojunction devices; Operational amplifier (Op amp)

Indexed keywords

ANALOG CIRCUITRY; FIELD PROGRAMMABLE ANALOG ARRAYS; FUNCTION BLOCK; HIGH-DENSITY; LOW-POWER OPERATION; NANO-DEVICES; NANOJUNCTIONS; NEUROMORPHIC; NEUROMORPHIC SYSTEMS; PROGRAMMABLE COMPONENTS; PROPOSED ARCHITECTURES;

NANOSTRUCTURED MATERIALS; NETWORK ARCHITECTURE; OPERATIONAL AMPLIFIERS;

ANALOG CIRCUITS;

EID: 84885889084     PISSN: 18678211     EISSN: None     Source Type: Book Series    
DOI: 10.1007/978-3-642-02427-6_9     Document Type: Conference Paper

References (12)

1. Hall, T.S., Twigg, C.M., Hasler, P.: Large-scale field- programmable analog arrays for analog signal processing. IEEE Trans. Circuits and Systems-I 52(11), 2298-2307 (2005) (Pubitemid 41723944)
2. Gulak, P.G.: Field-programmable analog arrays: past, present and future perspectives. In: IEEE Int'l Conf. on Microelectronics and VLSI, pp. 123-126 (November 1995)
3. Gray, J.D., Twigg, C.M., Hasler, P.: Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. In: ISCAS 2005, vol. 1, pp. 468-471 (May 2005)
4. Hasler, P.E., Twigg, C.M.: An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. In: ISCAS 2007, pp. 177-180 (May 2007) (Pubitemid 47448470)
5. Tu, D., Liu, M., Wang, W., Haruehanroengra, S.: 3D CMOL: A 3D FPGA using CMOS/nanomaterial hybrid digital circuits. IEE Micro and Nano Letters 2(2), 40-45 (2007) (Pubitemid 47035542)
6. Türel, Ö., Lee, J.H., Ma, X., Likharev, K.K.: Nanoelectronic neuromorphic networks (crossnets): new results. In: Proc. IJCNN 2004, pp. 389-394 (2004) (Pubitemid 40011770)
7. Türel, Ö., Lee, J.H., Ma, X., Likharev, K.K.: Neuromorphic Architectures for Nanoelectronic Circuits. Int. J. of Circuit Theory and Applications 32, 277-302 (2004)
8. Lee, J.H., Likharev, K.K.: Defect-Tolerant nanoelectronic pattern classifiers. Int. J. of Circuit Theory and Applications 35, 239-264 (2007) (Pubitemid 46848192)
9. Gao, C., Hammerstrom, D.: Cortical Models Onto CMOL and CMOL-Architectures and Performance/Price. IEEE Trans. Circuit and System I 54(11) (November 2007)
10. Chen, D., Wang, W., Haruehanroengra, S.: Efficient structures for CMOL circuits. IEE Micro and Nano Letters 1(2), 74-78 (2006)
11. Dong, C., Liu, D., Haruehanroengra, S., Wang, W.: 3D nFPGA: A reconfigurable architecture for 3D CMOS/nanomaterial hybrid digital circuits. IEEE Trans. Circuits and Systems I 54(1), 2489-2501 (2007)
12. Guan, W., Liu, M., Wang, W.: Nonpolar nonvolatile resistive switching in Cu doped ZrO2. IEEE Electronic Device Letters 29(5), 434-438 (2008)