Bounding SDRAM interference: Detailed analysis vs. Latency-rate analysis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2013, Pages 308-313

  Shah, Hardik ^a   Knoll, Alois ^b   Akesson, Benny ^c  

^a FORTISS GMBH   (Germany)

^b TECHNICAL UNIVERSITY OF MUNICH   (Germany)

^c POLYTECHNIC INSTITUTE OF PORTO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; BENCHMARKING; DYNAMIC RANDOM ACCESS STORAGE; INTERACTIVE COMPUTER SYSTEMS;

EXPERIMENTAL COMPARISON; INTERFERENCE ANALYSIS; MULTI PROCESSOR SYSTEMS; SHARED RESOURCES; STATIC PRIORITY; TEMPORAL ABSTRACTION; UNIFIED ANALYSIS; WORST-CASE EXECUTION TIME;

REAL TIME SYSTEMS;

EID: 84885643203     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2013.075     Document Type: Conference Paper

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