Extraction of channel electron effective mobility in InGaAs/Al 2O3 n-FinFETs

IEEE Transactions on Nanotechnology

Volumn 12, Issue 5, 2013, Pages 806-809

  Hu, Yaodong ^a   Li, Shengwei ^a   Jiao, Guangfan ^a   Wu, Y Q ^b   Huang, Daming ^a   Ye, Peide D ^b   Li, Ming Fu ^a  

^a FudanUniversity ^*  (China)

^b PURDUE UNIVERSITY   (United States)

Author keywords

Al2O3; FinFETs; InGaAs; mobility; nano scale transistor; quasi ballistic transport

Indexed keywords

CONDUCTION BAND ENERGY; FINFETS; INCREASING TEMPERATURES; INGAAS; NANOSCALE TRANSISTORS; QUASI-BALLISTIC TRANSPORT; TEMPERATURE DEPENDENCE; TRANSMISSION COEFFICIENTS;

BALLISTICS; CARRIER MOBILITY; MOSFET DEVICES; SEMICONDUCTING INDIUM; STATISTICAL MECHANICS; TEMPERATURE; TRANSPORT PROPERTIES;

INTEGRATED CIRCUITS;

EID: 84883753838     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2013.2274282     Document Type: Article

References (26)

1. S. M. Sze, Physics of Semiconductor Devices. New York, NY, USA: Wiley, 1981
2. M. Radosavljevic, B. Chu-Kung, S. Corcoran, G. Dewey, M. K. Hudait, J. M. Fastenau, J. Kavalieros, W. K. Liu, D. Lubyshev, M. Metz, K. Millard, N. Mukherjee, W. Rachmady, U. Shah, and R. Chau, "Advanced high-k gate dielectric for high-performance short-channel In0.7Ga0.3 As quantum well field effect transistors on silicon substrate for low power logic applications," in Proc. IEDM, Tech. Digest, 2009, pp. 319-322
3. J. Huang, N. Goel, H. Zhao, C. Y. Kang, K. S. Min, G. Bersuker, S. Oktyabrsky, C. K. Gaspe, M. B. Santos, P. Majhi, P. D. Kirsch, H. -H. Tseng, J. C. Lee, and R. Jammy, "InGaAs MOSFET performance and reliability improvement by simultaneous reduction of oxide and interface charge in ALD (La)AlOx/ZrO2 stack," in Proc. IEDM, Tech. Digest, 2009, pp. 335-338
4. Y. Q. Wu, R. S. Wang, T. Shen, J. J. Gu, and P. D. Ye, "First experimental demonstration of 100 nm inversion-mode InGaAs FinFET through damage-free sidewall etching," in Proc. IEDM Tech. Dig., 2009, pp. 331- 334
5. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "on the universality of inversion layer mobility in Si MOSFET's: Part I," IEEE Trans. Electron Devices, vol. 41, no. 12, pp. 2357-2362, Dec. 1994
6. T. Low, M. F. Li, W. J. Fan, S. T.Ng, Y. C. Yeo, C. Zhu,A.Chin, L. Chan, and D. L. Kwong, "Impact of surface roughness on silicon and germanium ultra-thin-body MOSFETs," in Proc. IEDMTech. Dig, 2004, pp. 151-154 (Pubitemid 40928249)
7. K. Uchida, H. Watanabe, A. Kinoshita, J. Koga, T. Numata, and S. I. Takagi, "Experimental study on carrier transport mechanism in ultrathin-body SOI nand p-MOSFETs with SOI thickness less than 5 nm," in Proc. IEDM Tech. Dig., 2002, pp. 47-50
8. M. Lundstrom, Physics of nanoscale transistors. Lecture 4 : Carrier scattering in nanoscale MOSFETs, p.35, Lecture 3 A: Physics of nanoscale transistors, p. 29 and p. 31, and Lecture 3B: Theory of ballistic MOSFET. Available: http://www.nanohub.org/resource/5306 (2008)
9. A. Rahman and M. S. Lundstrom, "A compact scalling model for the nanoscale double-gate MOSFET," IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 481-489, Mar. 2002 (Pubitemid 34404847)
10. D. K. Schroder, Semiconductor Material and Device Characterization. Hoboken, NJ, USA: Wiley, 2006
11. W. Shockley, "Diffusion and drift of minority carriers in semiconductors for comparable capture and scattering mean free paths," Phys. Rev., vol. 125, pp. 1570-1576, 1962
12. I. Vurgaftman, J. R. Meyer, and L. R. Ram-Mohan, "Band parameters for III-V compound semiconductors and their alloys," J. Appl. Phys., vol. 89, no. 11, pp. 5815-5875, Jun. 2001 (Pubitemid 33599303)
13. J. S. Blackmore, "Approximations for Fermi-Dirac integrals, especially the function F1/ 2 (η) used to describe electron density in a semiconductor," Solid State Electron., vol. 25, pp. 1067-1076, 1982
14. M. S. Shur, "Low ballistic mobility in submicron HEMTs," IEEE Trans. Electron Devices, vol. 23, no. 9, pp. 511-513, Sep. 2002 (Pubitemid 35022939)
15. D. Varghese, Y. Xuan, Y. Q. Wu, T. Shen, P. D. Ye, and M. A. Alam, "Multi-probe interface characterization of InGaAs/Al2 O3 MOSFET," in Proc. IEDM Tech. Dig., 2009, pp. 379-382
16. J. J. Gu, Y. Q. Liu, Y. Q. Wu, R. Colby, R. G. Gorde, and P. D. Ye, "First experimental demonstration of gate-all-around III-V MOSFETs by topdown approach," in Proc. IEDM Tech. Dig., 2011, pp. 769-772
17. S. Luryi, "Quantum capacitance devices," Appl. Phys. Lett., vol. 52, no. 6, pp. 501-503, Feb. 1988
18. S. Datta, Electronic Transport inMesoscopic Systems. Cambridge, U.K: Cambridge Univ. Press, 1995, p. 55 and p. 202
19. S. Takagi, M. Takayanagi, and A. Toriumi, "Accurate characterization of electron and hole inversion-layer capacitance and its impact on low voltage operation of scaled MOSFETs," in Proc. IEDM Tech. Dig., 1998, pp. 619-622
20. N. Taoka, M. Yokoyama, S. H. Kim, R. Suzuki, R. Iida, S. Lee, T. Hoshii, W. Jevasuwan, T. Maeda, T. Yasuda, O. Ichikawa, N. Fukuhara, M. Hata, M. Takenaka, and S. Takagi, "Impact of Fermi level pinning inside conduction band on electron mobility of InGaAs MOSFETs and mobility enhancement by pinning modulation," in Proc. IEDM Tech. Dig., 2011, pp. 610-613
21. G. F. Jiao, W. Cao, Y. Xuan, D. M. Huang, P. D. Ye, and M. F. Li, "Positive bias temperature instability degradation of InGaAs n-MOSFETs with Al2O3 Gate Dielectric," in Proc. IEDM Tech. Dig., 2011, pp. 606-609
22. Y. Yang, L. Wang, B. Yu, B. Shin, J. Ahn, P. C. Mcintyre, P. M. Asbeck, M. J. W. Rodwell, and Y. Taur, "A distributed model doe border traps in Al2 O3-InGaAs MOS devices," IEEE Electron Device Lett., vol. 32, no. 4, pp. 485-487, Apr. 2011
23. W. Zhu, J. P. Han, and T. P. Ma, "Mobility measurement and degradation mechanisms of MOSFETs made with ultrathin high-k doelectrics," IEEE Trans. Electron Devices, vol. 51, no. 1, pp. 98-105, Jan. 2004
24. S. C. Sun and J. D. Plummer, "Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces," IEEE Trans. Electron Devices, vol. 27, no. 8, pp. 1487-1507, Aug. 1980
25. F. C. Hsu and S. Tam, "Relationship between MOSFET degradation and hot-electron-induced interface state generation," IEEE Trans. Electron Devices, vol. 5, no. 2, pp. 50-52, Feb. 1984 (Pubitemid 14652856)
26. M. Heyns, A. Alian, G. Brammerts, M. Caymax, Y. C. Chang, L. K. Chu, B. De Jaeger, G. Eneman, F. Gencarelli, G. Groeseneken, G. Hellings, A. Hekavyy, T. Y. Hoffmann, M. Houssa, C. Huyghebaert, D. Leonelli, D. Lin, R. Loo,W. Magnus, C. Merckling, M. Meuris, J. Mitard, L. Nyns, T. Orzali, R. Rooyackers, S. Sioncke, B. Soree, X. Sun, A. Vandooren, A. S. Verhulst, B. Vincent, N. Waldron, G. Wang, W. E. Wnag, and L. Witters, "Advancing CMOS beyond the Si roadmap with Ge and III/V devices," in Proc. IEDM, Tech. Digest, 2011, pp. 299-302