Topography and Schottky contact models applied to NiSi SALICIDE process [MOSFET applications]

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn 2003-January, Issue , 2003, Pages 59-62

  Kusunoki, N ^a   Ohuchi, K ^a   Hokazono, A ^a   Aoki, N ^a   Tanimoto, H ^a   Matsuzawa, K ^b  

^a SoC Research and Development Center   (Japan)

^b TOSHIBA CORPORATION   (Japan)

Author keywords

Calibration; Contact resistance; MOSFETs; Nickel; Schottky barriers; Semiconductor device modeling; Silicidation; Silicides; Silicon; Surfaces

Indexed keywords

CALIBRATION; CONTACT RESISTANCE; ELECTRON BEAM LITHOGRAPHY; END EFFECTORS; NICKEL; SCHOTTKY BARRIER DIODES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICES; SILICIDES; SILICON; SURFACES; TOPOGRAPHY;

65-NM NODE; INTEGRATED SIMULATIONS; MOSFETS; NICKEL MONOSILICIDE; SCHOTTKY BARRIERS; SCHOTTKY CONTACTS; SELF-ALIGNED SILICIDES; SILICIDATION;

MOSFET DEVICES;

EID: 84880240636     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SISPAD.2003.1233637     Document Type: Conference Paper

References (9)

1. H. Iwai, T. Ohguro, S. Ohmi, Microelectronic Engineering, 60, p.157 (2002).
2. K. Ohuchi, K. Adachi, A. Hokazono and Y. Toyoshima, Mat. Res. Soc. Symp. Proc., vol. 717, p. 77 (2002).
3. A. Hokazono, K. Ohuchi, K. Miyano, I. Mizushima, Y. Tsunashima and Y. Toyoshima, IEDM Tech. Dig., p.243 (2000).
4. P. Oldiges, C. Murthy, X. Wang, S. Fung and R. Purtell, Proc. SISPAD, p.39 (2002).
5. P. Fornara and A. Poncet, IEDM Tech. Dig., p.73 (1996).
6. M.-a. Nicolet and S. S. Lau, in VLSI Electronics Microstructure Science, edited by N. G. Einspruch and G. B. V. Larrabee, Vol. 6, p. 457 (1983).
7. K. Matsuzawa, K. Uchida and A. Nishiyama, IEEE Trans. Electron Devices, ED-47, p.103 (2000).
8. D.-X. Xu , S. R. Das, C. J. Peters and L. E. Erickson, Thin Solid Films, 326, p.143 (1998).
9. Q. Xiang, C. Woo, E. Paton, J. Foster, B. Yu and M-R. Lin, Symp. on VLSI Tech. , p. 76 (2000).