-
1
-
-
2342466672
-
Analysis of the power delivery path from the 12-V VR to the microprocessor
-
Feb.
-
Y. Ren, K. Yao, M. Xu, and F. C. Lee, "Analysis of the power delivery path from the 12-V VR to the microprocessor," in Proc. IEEE APEC, Feb. 2004, vol. 1, pp. 285-291.
-
(2004)
Proc. IEEE APEC
, vol.1
, pp. 285-291
-
-
Ren, Y.1
Yao, K.2
Xu, M.3
Lee, F.C.4
-
2
-
-
27744455117
-
Understanding the effect of power MOSFET package parasitic on VRM circuit efficiency at frequencies above 1 MHz
-
May
-
M. Pavier, A. Woodworth, A. Sawle, R. Monteiro, C. Blake, and J. Chiu, "Understanding the effect of power MOSFET package parasitic on VRM circuit efficiency at frequencies above 1 MHz," in Proc. PCIM Eur., May 2003, pp. 279-284.
-
(2003)
Proc. PCIM Eur.
, pp. 279-284
-
-
Pavier, M.1
Woodworth, A.2
Sawle, A.3
Monteiro, R.4
Blake, C.5
Chiu, J.6
-
3
-
-
39749102871
-
Advanced power SiP with wireless bonding for voltage regulators
-
ISPSD '07 27-31 May 2007
-
T. Hashimoto, T. Uno, Y. Satou, M. Shiraishi, T. Kawashima, N. Matsuura, "Advanced Power SiP with Wireless Bonding for Voltage Regulators," Power Semiconductor Devices and IC's, 2007. ISPSD '07, pp.125-128, 27-31 May 2007.
-
(2007)
Power Semiconductor Devices and IC's
, pp. 125-128
-
-
Hashimoto, T.1
Uno, T.2
Satou, Y.3
Shiraishi, M.4
Kawashima, T.5
Matsuura, N.6
-
4
-
-
33947159688
-
Lateral power MOSFET for megahertz-frequency, high-density DC/DC converters
-
Jan.
-
Z.J. Shen, D.N Okada, F. Lin, S. Anderson, C. Xu, "Lateral power MOSFET for megahertz-frequency, high-density DC/DC converters," IEEE Transactions on Power Electronics, vol.21, no.1, pp. 11-17, Jan. 2006.
-
(2006)
IEEE Transactions on Power Electronics
, vol.21
, Issue.1
, pp. 11-17
-
-
Shen, Z.J.1
Okada, D.N.2
Lin, F.3
Anderson, S.4
Xu, C.5
-
6
-
-
51549085821
-
High power AlGaN/GaN HFET with a high breakdown voltage of over 1.8 kV on 4 inch si substrates and the suppression of current collapse
-
ISPSD '08 18-22 May 2008
-
N. Ikeda, S. Kaya, L. Jiang, Y. Sato, S. Kato, S. Yoshida, "High power AlGaN/GaN HFET with a high breakdown voltage of over 1.8 kV on 4 inch Si substrates and the suppression of current collapse," Power Semiconductor Devices and IC's, 2008. ISPSD '08. pp.287-290, 18-22 May 2008.
-
(2008)
Power Semiconductor Devices and IC's
, pp. 287-290
-
-
Ikeda, N.1
Kaya, S.2
Jiang, L.3
Sato, Y.4
Kato, S.5
Yoshida, S.6
-
7
-
-
84860191588
-
Gallium nitride based multimegahertz high density 3D point of load module
-
Feb.
-
D. Reusch, D. Gilham, Y. Su and F.C. Lee, "Gallium nitride based multimegahertz high density 3D point of load module," APEC 2012. pp.38-45. Feb. 2012.
-
(2012)
APEC 2012
, pp. 38-45
-
-
Reusch, D.1
Gilham, D.2
Su, Y.3
Lee, F.C.4
-
8
-
-
8744239696
-
Effects of parasitic inductances on switching performance
-
May
-
A. Elbanhawy, "Effects of parasitic inductances on switching performance," in Proc. PCIM Eur., May 2003, pp. 251-255.
-
(2003)
Proc. PCIM Eur.
, pp. 251-255
-
-
Elbanhawy, A.1
-
9
-
-
27744525404
-
A method to determine parasitic inductances in buck converter topologies
-
May
-
G. Nobauer, D. Ahlers, J. Sevillano-Ruiz, "A method to determine parasitic inductances in buck converter topologies," in Proc. PCIM Eur., May 2004, pp. 37-41.
-
(2004)
Proc. PCIM Eur.
, pp. 37-41
-
-
Nobauer, G.1
Ahlers, D.2
Sevillano-Ruiz, J.3
-
10
-
-
33744987221
-
Effect and utilization of common source inductance in synchronous rectification
-
Mar.
-
B. Yang, J. Zhang, "Effect and utilization of common source inductance in synchronous rectification," in Proc. IEEE APEC'05, Mar. 2005, vol. 3, pp. 1407-1411.
-
(2005)
Proc. IEEE APEC'05
, vol.3
, pp. 1407-1411
-
-
Yang, B.1
Zhang, J.2
-
11
-
-
49249120333
-
System in package with mounted capacitor for reduced parasitic inductance in voltage regulators
-
APEC 2008. Twenty-Third Annual IEEE 24-28 Feb. 2008
-
T. Hashimoto, T. Kawashima, T. Uno, Y. Satou, N. Matsuura, "System in package with mounted capacitor for reduced parasitic inductance in voltage regulators," Applied Power Electronics Conference and Exposition, 2008. APEC 2008. Twenty-Third Annual IEEE, pp.187-191, 24-28 Feb. 2008.
-
(2008)
Applied Power Electronics Conference and Exposition
, pp. 187-191
-
-
Hashimoto, T.1
Kawashima, T.2
Uno, T.3
Satou, Y.4
Matsuura, N.5
-
12
-
-
27744601909
-
Multi chip module with minimum parasitic inductance for new generation voltage regulator
-
Y. Kawaguchi, T. Kawano, H. Takei, S. Ono, A. Nakagawa, "Multi Chip Module with Minimum Parasitic Inductance for New Generation Voltage Regulator," Power Semiconductor Devices and ICs, 2005.
-
(2005)
Power Semiconductor Devices and ICs
-
-
Kawaguchi, Y.1
Kawano, T.2
Takei, H.3
Ono, S.4
Nakagawa, A.5
-
13
-
-
49249118880
-
System design of a 3D integrated non-isolated point of load converter
-
Twenty-Third Annual IEEE 24-28 Feb. 2008
-
A. Ball, M. Lim, D. Gilham, F.C Lee, "System design of a 3D integrated non-isolated Point Of Load converter," Applied Power Electronics Conference and Exposition, 2008. Twenty-Third Annual IEEE, pp.181-186, 24-28 Feb. 2008.
-
(2008)
Applied Power Electronics Conference and Exposition
, pp. 181-186
-
-
Ball, A.1
Lim, M.2
Gilham, D.3
Lee, F.C.4
-
14
-
-
84870919378
-
Optimization of a high density gallium nitride based non-isolated point of load module
-
IEEE, Sept.
-
D. Reusch, F.C. Lee, Y. Su, D. Gilham, "Optimization of a High Density Gallium Nitride Based Non-Isolated Point of Load Module," Energy Conversion Congress and Exposition (ECCE), IEEE, Sept. 2012.
-
(2012)
Energy Conversion Congress and Exposition (ECCE)
-
-
Reusch, D.1
Lee, F.C.2
Su, Y.3
Gilham, D.4
|