Optimization of a high density gallium nitride based non-isolated point of load module

2012 IEEE Energy Conversion Congress and Exposition, ECCE 2012

Volumn , Issue , 2012, Pages 2914-2920

  Reusch, David ^a   Lee, Fred C ^a   Gilham, David ^a   Su, Yipeng ^a  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CERAMIC SUBSTRATES; CONVENTIONAL TECHNOLOGY; HIGH DENSITY; HIGH FREQUENCY; HIGH THERMAL CONDUCTIVITY; HIGHER EFFICIENCY; HIGHER FREQUENCIES; HIGHLY INTEGRATED; INDUSTRY PRODUCTS; LAYOUT PARASITICS; MAGNETIC SUBSTRATE; OUTPUT CURRENT; PACKAGING PARASITICS; PARASITICS; POINT OF LOADS; POINT-OF-LOAD CONVERTERS; POWER DENSITIES; POWER SUPPLY; STATE OF THE ART; THERMAL DESIGNS;

ALUMINA; CHIP SCALE PACKAGES; DESIGN; ENERGY CONVERSION; EXHIBITIONS; THERMAL CONDUCTIVITY; THREE DIMENSIONAL COMPUTER GRAPHICS;

GALLIUM NITRIDE;

EID: 84870919378     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECCE.2012.6342367     Document Type: Conference Paper

References (22)

1. Enpirion. EN63A0QI-12 Amp High Efficiency Buck Converter with Integrated Inductor. www.enpirion.com.
2. Linear Technology. LTM4601A Data Sheet. www.linear.com.
3. I. Sano, Y. Usui, and T. Seki, "A 2nd generation micro DC-DC converter," Fuji Electr. Rev., vol. 53, no. 3, pp. 89-92, 2007.
4. National Semiconductor. LMZ10500-650mA SIMPLE SWITCHER® Nano Module with 5.5V Maximum Input Voltage. www.national.com.
5. Ball, Arthur; Lim, Michele; Gilham, David; Lee, Fred C., "System design of a 3D integrated non-isolated Point Of Load converter," Applied Power Electronics Conference and Exposition, 2008. APEC 2008. Twenty-Third Annual IEEE, vol., no., pp.181-186, 24-28 Feb. 2008
6. Michele H. Lim, Jacobus. D. van Wyk, F. C. Lee, and Khai D. T. Ngo, "A Class of Ceramic-Based Chip Inductors for Hybrid Integration in Power Supplies", IEEE Transactions on Power Electronics, vol. 23, no. 3, pp. 1556-1564, May 2008.
7. Tsutomu Mikura, Koichi Nakahara, Kota Ikeda, Ken Furukuwa, and Katsuhiko Onitsuka, "New substrate for micro DC-DC converter", Electronic Components and Technology Conference, 2006, pp. 1326-1330.
8. Reusch, D.; Lee, F.C.; Ming Xu;, "Three level buck converter with control and soft startup," Energy Conversion Congress and Exposition, 2009. ECCE 2009. IEEE, vol., no., pp.31-35, 20-24 Sept. 2009
9. Ikeda, N.; Kaya, S.; Jiang Li; Sato, Y.; Kato, S.; Yoshida, S.;, "High power AlGaN/GaN HFET with a high breakdown voltage of over 1.8 kV on 4 inch Si substrates and the suppression of current collapse," Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on, vol., no., pp.287-290, 18-22 May 2008
10. A. Lidow, J. Strydom, M. de Rooij Y. Ma. "GaN Transistors for Efficient Power Conversion", 1rst ed. El Segundo, Ca, 2012.
11. "GaNpowIR-An Introduction", IRF.com. Feb 2010
12. David Reusch, David Gilham, Yipeng Su and Fred C. Lee, "Gallium nitride based multi-megahertz high density 3D point of load module," APEC 2012. Feb. 2012. pp.38-45.
13. Hashimoto, T.; Kawashima, T.; Uno, T.; Satou, Y.; Matsuura, N.;, "System in package with mounted capacitor for reduced parasitic inductance in voltage regulators," Applied Power Electronics Conference and Exposition, 2008. APEC 2008. Twenty-Third Annual IEEE, vol., no., pp.187-191, 24-28 Feb. 2008
14. Kawaguchi, Y.; Kawano, T.; Takei, H.; Ono, S.; Nakagawa, A.;, "Multi Chip Module with Minimum Parasitic Inductance for New Generation Voltage Regulator," Power Semiconductor Devices and ICs, 2005.
15. A. Elbanhawy, "Effects of parasitic inductances on switching performance," in Proc. PCIM Eur., May 2003, pp. 251-255.
16. M. Pavier, A. Woodworth, A. Sawle, R. Monteiro, C. Blake, and J. Chiu,"Understanding the effect of power MOSFET package parasitic on VRM circuit efficiency at frequencies above 1 MHz," in Proc. PCIM Eur., May 2003, pp. 279-284.
17. G. Nobauer, D. Ahlers, and J. Sevillano-Ruiz, "A method to determine parasitic inductances in buck converter topologies," in Proc. PCIM Eur., May 2004, pp. 37-41.
18. B. Yang and J. Zhang, "Effect and utilization of common source inductancein synchronous rectification," in Proc. IEEE APEC'05, Mar. 2005, vol. 3, pp. 1407-1411.
19. David Reusch, "High Frequency, High Power Density Integrated Point of Load and Bus Converters", PhD Dissertation, Virginia Tech 2012.
20. Yuancheng Ren; Ming Xu; Jinghai Zhou; Lee, F.C.;, "Analytical loss model of power MOSFET," Power Electronics, IEEE Transactions on, vol.21, no.2, pp. 310-319, March 2006.
21. Yucheng Ying, "Device selection criteria-based on loss modeling and Figure of Merit", Master's Thesis, Virginia Tech, 2008.
22. Yipeng Su, Qiang Li, David Reusch, Fred Lee, David Gilham, "High Frequency LTCC Planar Inductor Substrate Design and Evaluation for Integrated DC/DC Converter with Gan Device". APEC 2012.