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Volumn 8, Issue 1, 2013, Pages 56-58

Performance analysis of single-walled carbon nanotube bundle interconnects for three-dimensional integration applications

Author keywords

[No Author keywords available]

Indexed keywords

CARBON NANOTUBE BUNDLE; EQUIVALENT CIRCUIT MODEL; INTERCONNECT LEVELS; PERFORMANCE ANALYSIS; SINGLE-WALLED CARBON NANOTUBE BUNDLE; SINGLEWALLED CARBON NANOTUBE (SWCNT); TECHNOLOGY SCALING; THREE DIMENSIONAL INTEGRATION;

EID: 84877859405     PISSN: None     EISSN: 17500443     Source Type: Journal    
DOI: 10.1049/mnl.2012.0856     Document Type: Article
Times cited : (4)

References (13)
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  • 4
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    • Burke, P.J.1
  • 5
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    • DOI 10.1109/LED.2004.841440
    • Naeemi A., Sarvari R., Meindl J.D.: 'Performance comparison between carbon nanotube and copper interconnects for gigascale integration (GSI)', IEEE Electron Device Lett., 2005, 26, pp. 84-86 (Pubitemid 40205844)
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    • Naeemi, A.1    Sarvari, R.2    Meindl, J.D.3
  • 6
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  • 8
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    • http://ptm.asu.edu/
  • 9
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    • Electrical modeling and characterization of through silicon via for three dimensional ICs
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    • (2010) IEEE Trans. Electron Devices , vol.57 , pp. 256-262
    • Katti, G.1    Stucchi, M.2    Meyer, K.D.3    Dehaene, W.4
  • 10
    • 84877865889 scopus 로고    scopus 로고
    • Repeater insertion for two terminal nets in three dimensional integrated circuits
    • Lucerne, Switzerland, October
    • Xu H., Pavilidis V.F., Micheli G.D.: 'Repeater insertion for two terminal nets in three dimensional integrated circuits' (Nano-Net, Lucerne, Switzerland, October 2009), pp. 141-150
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  • 12
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    • Estimation of time delay and repeater insertion in multiwall carbon nanotube interconnects
    • Liang F.,Wang G.F., DingW.: 'Estimation of time delay and repeater insertion in multiwall carbon nanotube interconnects', IEEE Trans. Electron Devices, 2011, 58, pp. 2712-2720
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  • 13
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    • Compact AC modeling and performance analysis of through silicon vias in 3-D ICs
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.