A test platform for the thermal, electrical, and mechanical characterization of packages

Proceedings - 2009 International Symposium on Microelectronics, IMAPS 2009

Volumn , Issue , 2009, Pages 524-531

  Schauer, Justin ^a   Pinckney, Nathaniel ^a   Nettleton, Nyles ^a   Popovic, Darko ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

Characterization; Electrical; Mechanical; Package; Proximity; Thermal

Indexed keywords

ELECTRICAL; MECHANICAL; PACKAGE; PROXIMITY; THERMAL;

CHARACTERIZATION; DYNAMIC LOADS; MICROELECTRONICS; MICROPROCESSOR CHIPS;

ELECTRIC POWER SYSTEMS;

EID: 84876924722     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. R. J. Drost, R. D. Hopkins, R. Ho, and I. E. Sutherland, "Proximity Communication," IEEE J. of Solid-State Circuits, vol. 39, no. 9, pp. 1529-1535, Sep. 2004.
2. A. Chow, D. Hopkins, R. Drost, and R. Ho, "Enabling technologies for multi-chip integration using proximity communication," International Symp. on VLSI-DAT, pp. 39-42, Apr. 2009.
3. A. Poppe et al., "Design Issues of a Multi-Functional Intelligent Thermal Test Die," Proc. 17th IEEE Semi-Therm Symposium, pp. 50-56, 2001.
4. B. Siegal and J. Galloway, "Thermal Test Chip Design and Performance Considerations," Proc. 24th IEEE Semi-Therm Symposium, pp. 59-62, 2008.
5. A. Chow, D. Hopkins, R. Ho, and R. Drost, "Measuring 6D Chip Alignment in Multi-Chip Packages," IEEE Sensors, pp. 1307-1310, Oct. 2007.
6. J. Mitchell, J. Cunningham, A. V. Krishnamoorthy, R. Drost, and R. Ho, "Integrating Novel Packaging Technologies for Large Scale Computer Systems," Proceedings of Inter PACK 2009, July 2009.
7. G. K. Konstadinidis et. al., "Architecture and Physical Implementation of a Third Generation 65 nm, 16 core, 32 Thread Chip-Multithreading SPARC Processor," IEEE J. of Solid-State Circuits, vol. 44, no. 1, pp. 7-17, Jan. 2009.
8. R. Ho et al., "Applications of On-Chip Samplers for Test and Measurement of Integrated Circuits," Symp. on VLSI Circuits, pp. 138-139, June 1998.
9. A. Chow, R. D. Hopkins, and J. M. Schauer, "Measuring Chip-to-Chip Capacitance Differentials By Demodulating Signals Over A Capacitance Bridge," U.S. Patent 7,425,836, September 16, 2008.
10. D. Hopkins et al., "Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication," ISSCC Dig. Tech. Papers, pp. 368-609, Feb. 2007.