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Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

A non-linear ReRAM cell with sub-1μA ultralow operating current for high density vertical resistive memory (VRRAM)

(13) Park, Seong Geon a Yang, Min Kyu a Ju, Hyunsu a Seong, Dong Jun a Lee, Jung Moo a Kim, Eunmi a Jung, Seungjae a Zhang, Lijie a Shin, Yoo Cheol a Baek, In Gyu a Choi, Jungdal a Kang, Ho Kyu a Chung, Chilhee a

a SAMSUNG Electronics (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAY STRUCTURES; NON-LINEAR I-V; OPERATING CURRENTS; RESISTIVE MEMORY; RESISTIVE SWITCHING; SWITCHING BEHAVIORS; THIN INSULATING LAYERS; TRANSITION-METAL OXIDES;

ELECTRON DEVICES;

RANDOM ACCESS STORAGE;

EID: 84876142621 PISSN: 01631918 EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/IEDM.2012.6479084 Document Type: Conference Paper

Times cited : (72)

References (5)

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3
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- Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications
- Hong Sik Yoon, ln-Gyu Baek, Jinshi Zhao, Hyunjun Sim, Min Young Park, Hansin Lee, Gyu-Hwan Oh, Jong Chan Shin, In-Seok Yeo, and UIn Chung, "Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications," VLSI Tech. Digest, p. 26, 2009
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- Vertical cell array using TCAT(Terabit Cell Array Transistor) technology for ultra high density NAND Flash memory
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5
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- Scaling challenges for the cross-point resistive memory array to sub-10nm node-An interconnect perspective
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- Liang, J.¹ Yeh, S.² Simon Wong, S.³ Philip Wong, H.-S.⁴

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.