Threshold Vacuum Switch (TVS) on 3D-stackable and 4F2 cross-point bipolar and unipolar resistive random access memory

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Ho, Chiahua ^a   Huang, Hsin Hau ^a,b,c   Lee, Ming Taou ^a   Hsu, Cho Lun ^a   Lai, Tung Yen ^a   Chiu, Wen Cheng ^a   Lee, Meiyi ^a   Chou, Tong Huan ^a   Yang, Ivy ^a   Chen, Min Cheng ^a   Wu, Cheng San ^a   Chiang, Kuang Hao ^e   Yao, Yong Der ^b,d   Hu, Chenming ^f   Yang, Fu Liang ^a  

^a National Nano Device Laboratories (NDL) National Applied Research Laboratories (NARL)   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c Mesoscope Technology Co Ltd   (Taiwan)

^d FU JEN CATHOLIC UNIVERSITY   (Taiwan)

^e CHUNG YUAN CHRISTIAN UNIVERSITY   (Taiwan)

^f UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH CURRENT DENSITIES; MECHANISM-BASED; RESISTIVE RANDOM ACCESS MEMORY; STRESS TEST; THRESHOLD CHARACTERISTICS; VACUUM SWITCH; VACUUM SWITCHING; WAVE FORMS;

ELECTRON DEVICES;

THREE DIMENSIONAL COMPUTER GRAPHICS;

EID: 84876131743     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6478968     Document Type: Conference Paper

References (10)

1. B. Govoreanu, G. S. Kar, Y-Y. Chen, V. Paraschiv, S. Kubicek, A. Fantini, I. P. Radu, L. Goux, S. Clima, R. Degraeve, N. Jossart, O. Richard, T. Vandeweyer, K. Seo, P. Hendrickx, G. Pourtois, H. Bender, L. Altimime, D. J. Wouters, J. A. Kittl, and M. Jurczak, "10x10nm2 Hf/HfOx Crossbar Resistive RAM with Excellent Performance, Reliability and Low-Energy Operation", IEEE IEDM, p.729, 2011.
2. I. G. Baek, C. J. Park, H. Ju, D. J. Seong, H. S. Ahn, J. H. Kim, M. K. Yang, S. H. Song, E. M. Kim, S. O. Park, C. H. Park, C. W. Song, G. T. Jeong, S. Choi, H. K. Kang, and C. Chung, "Realization of Vertical Resistive Memory (VRRAM) using cost effective 3D Process", IEEE IEDM, p.737, 2011.
3. T. Ninomiya, T. Takagi, Z. Wei, S. Muraoka, R. Yasuhara, K. Katayama, Y. Ikeda, K. Kawai, Y. Kato, Y. Kawashima, S. Ito, T. Mikawa, K. Shimakawa and K. Aono, "Conductive Filament Scaling of TaOx Bipolar ReRAM for Long Retention with Low Current Operation", VLSI Symp., p.73, 2012.
4. Wei-Chih Chien, Ming-Hsiu Lee, Feng-Ming Lee, Yu-Yu Lin, Hsiang-Lan Lung, Kuang-Yeu Hsieh, and Chih-Yuan Lu, "A Multi-Level 40nm WOX Resistive Memory with Excellent Reliability", IEEE IEDM, p.725, 2011.
5. ChiaHua Ho, Cho-Lun Hsu, Chun-Chi Chen, Jan-Tsai Liu, Cheng-San Wu, Chien-Chao Huang, Chenming Hu, and Fu-Liang Yang, "9nm Half-Pitch Functional Resistive Memory Cell with
6. G. W. Burr, K. Virwani, R. S. Shenoy, A. Padilla, M. BrightSkyy, E. A. Josephy, M. Lofaroy, A. J. Kellock, R. S. King, K. Nguyen, A. N. Bowers, M. Jurich, C. T. Rettner, B. Jackson, D. S. Bethune, R. M. Shelby, T. Topuria, N. Arellano, P. M. Rice, B. N. Kurdi, and K. Gopalakrishnan, "Large-scale (512kbit) integration of Multilayer-ready Access Devices based on Mixed Ionic Electronic Conduction (MIEC) at 100% yield", IEEE VLSI Symp., p.41, 2012.
7. Wootae Lee, Jubong Park, Jungho Shin, Jiyong Woo, Seonghyun Kim, Godeuni Choi, Seungjae Jung, Sangsu Park, Daeseok Lee, Euijun Cha, Hyung Dong Lee, Soo Gil Kim, Suock Chung and Hyunsang Hwang, "Varistor-type Bidirectional Switch (JMAX > 107 A/cm2, Selectivity ~ 104 for 3D Bipolar Resistive Memory Arrays)", IEEE VLSI Symp., p.37, 2012.
8. Akifumi Kawahara, Ryotaro Azuma, Yuuichirou Ikeda, Ken Kawai, Yoshikazu Katoh, Kouhei Tanabe, Toshihiro Nakamura, Yoshihiko Sumimoto, Naoki Yamada, Nobuyuki Nakai, Shoji Sakamoto, Yukio Hayakawa, Kiyotaka Tsuji, Shinichi Yoneda, Atsushi Himeno, Ken-ichi Origasa, Kazuhiko Shimakawa, Takeshi Takagi, Takumi Mikawa, and Kunitoshi Aono, "An 8Mb Multi-Layered Cross-Point ReRAM Macro with 443MB/s Write Throughput", IEEE ISSCC, 25-6, 2012.
9. J. H. Oh, J. H. Park, Y. S. Lim, H. S. Lim, Y. T. Oh, J. S. Kim, J. M. Shin, J. H. Park, Y. J. Song, K. C. Ryoo, D. W. Lim, S. S. Park, J. I. Kim, J. H. Kim, J. Yu, F. Yeung, C. W. Jeong, J. H. Kong, D. H. Kang, G.H. Koh, G. T. Jeong, H. S. Jeong, and Kinam Kim, "Full Integration of Highly Manufacturable 512Mb PRAM based on 90nm Technology", IEEE IEDM, p.1, 2006.
10. ChiaHua Ho, E. K. Lai, M. D. Lee, C. L. Pan, Y. D. Yao, K. Y. Hsieh, Rich Liu, and C. Y. Lu, "A Highly Reliable Self-Aligned Graded Oxide WOx Resistance Memory: Conduction Mechanisms and Reliability", IEEE VLSI Symp., p.228, 2007.