A junctionless gate-all-around silicon nanowire FET of high linearity and its potential applications

IEEE Electron Device Letters

Volumn 34, Issue 4, 2013, Pages 478-480

  Wang, Tao ^a   Lou, Liang ^b   Lee, Chengkuo ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

linearity; silicon nanowire (SiNW) FET; Third order intermodulation (IM3)

Indexed keywords

DEGENERATE DOPING; GATE-ALL-AROUND; LINEAR BEHAVIOR; LINEARITY; LOAD RESISTANCES; RF APPLICATIONS; SILICON NANOWIRE FETS; THIRD-ORDER INTERMODULATION (IM3);

NANOWIRES;

SILICON;

EID: 84875670038     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2013.2244056     Document Type: Article

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