Graphene nanoribbon based negative resistance device for ultra-low voltage digital logic applications

Applied Physics Letters

Volumn 102, Issue 4, 2013, Pages

  Khatami, Yasin ^a   Kang, Jiahao ^a   Banerjee, Kaustav ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG AND DIGITAL CIRCUITS; AS DOPING; BISTABLES; COMPLEMENTARY LOGIC; DESIGN AND OPTIMIZATION; DESIGN PARAMETERS; DIGITAL LOGIC APPLICATIONS; ELECTROSTATIC DOPING; GATE WORKFUNCTION; GRAPHENE NANO-RIBBON; HETERO INTERFACES; HIGH DRIVE CURRENT; HIGH FLEXIBILITY; LOGIC APPLICATIONS; MEMORY CELL; OFF CURRENT; ON CURRENTS; PEAK-TO-VALLEY RATIOS; STATIC MEMORY CELLS; STATIC RANDOM ACCESS MEMORY; SUPPLY VOLTAGES; SWITCHING SPEED; ULTRALOW VOLTAGE;

DESIGN; NEGATIVE RESISTANCE; SEMICONDUCTOR STORAGE; STRUCTURE (COMPOSITION);

FIELD EFFECT TRANSISTORS;

EID: 84873605863     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.4788684     Document Type: Article

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