Weighted cellular automata design for test pattern generator based on genetic algorithm

Applied Mechanics and Materials

Volumn 273, Issue , 2013, Pages 840-844

  Tan, Enmin ^a   Li, Qingqing ^a   Jiang, Jigang ^a  

^a GUILIN UNIVERSITY OF ELECTRONIC TECHNOLOGY   (China)

Author keywords

Cellular automata; Genetic algorithms; Test pattern generator; Weight

Indexed keywords

BENCHMARK CIRCUIT; CERTAIN RULE; DESIGN FOR TEST; EVOLUTION ALGORITHMS; FAULT COVERAGES; MULTI OBJECTIVE; ONE-DIMENSION; RULE SET; RULES BASED; TEST LENGTHS; TEST PATTERN GENERATOR; VERILOG HDL; WEIGHT;

BUILT-IN SELF TEST; DESIGN; GENETIC ALGORITHMS; INNOVATION; INTEGRATED CIRCUIT TESTING; MANUFACTURE; OPTIMIZATION; VLSI CIRCUITS;

CELLULAR AUTOMATA;

EID: 84873178525     PISSN: 16609336     EISSN: 16627482     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/AMM.273.840     Document Type: Conference Paper

References (7)

1. D. J. Neebel, C. R. Kime: Cellular automata for weighted random pattern generation IEEE Transactions on Computer, 46(11): 1219-1229 (1997).
2. B. Cao, L. Y. Xiao, Y.S. Wang: A low power deterministic test pattern generator for bist based on cellular automata. Proceedings of 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA, Hong Kong, 23-25 January (2008), 266-269.
3. A.A. Ai-Yamani, E.J. Mccluskey. Seed encoding with lfsrs and cellular automata. Proceedings of Design Automation Conference, Anaheim, United States, 2-6 June (2003) 560-565.
4. F. Corno, M. Rebaudengo, M.S. Reorda, et al: Low power BIST via non-linear hybrid cellular automata. Proceedings of the 18th IEEE VLSI Test Symposium, Montreal, Que, Can, 30 April - 4 May (2000), 29-34.
5. X. W. Xia, Y. X. Li, Zh. F. Dai: Application of Twi-layer Cross Cellular Automata in Pseudorandom Numbers Generator. Journal of Chinese Computer Systems,29(9):1579-1583 (2008).
6. Xie Y L, Chen G J. Random Pattern Generation with Single Weighted Set for Digital Systems. Journal of Computer Aided Design & Computer Graphics, 2002,14(5):471-474.
7. R.H. He, X.W. Li, Y.Z. Gong: A scheme for low power BIST test pattern generator. Microelectronics and Computer, 20 (2):36-39 (2003).