B-Fetch: Branch prediction directed prefetching for in-order processors

IEEE Computer Architecture Letters

Volumn 11, Issue 2, 2012, Pages 41-44

  Panda, Reena ^a   Gratz, Paul V ^a   Jimenez, Daniel A ^b  

^a TEXAS A AND M UNIVERSITY SYSTEM   (United States)

^b Science Building   (United States)

Author keywords

Branch Prediction; Data Cache Prefetching; In order Processors; Memory Systems; Value Prediction

Indexed keywords

BRANCH PREDICTION; CACHE MISS; DATA CACHE PREFETCHING; DATA CACHES; DATA-PREFETCHING; ENERGY CONSIDERATIONS; HARDWARE OVERHEADS; LOOK-AHEAD; MEMORY ACCESS LATENCY; MEMORY SYSTEMS; PERFORMANCE PENALTIES; PREFETCHING; SUPERSCALAR; TECHNOLOGY SCALING; VALUE PREDICTION;

CACHE MEMORY; COMPUTER ARCHITECTURE; FORECASTING;

BENCHMARKING;

EID: 84870996405     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/L-CA.2011.33     Document Type: Article

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