Rank modulation hardware for flash memories

Midwest Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 294-297

  Kim, Mina ^a   Park, Jong Kap ^a   Twigg, Christopher M ^a  

^a State University of New York at Binghamton   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSOLUTE VALUES; CELL LEVELS; FLASH MEMORY CELL; FLASH TECHNOLOGY; MEMORY RELIABILITY; MOBILE APPLICATIONS; MULTILEVEL CELL; NON-VOLATILE MEMORIES; PERSISTENT STORAGE; RELATIVE RANKINGS; SOLID-STATE DRIVES; STORAGE DENSITIES; WEAR LEVELING; WINNER-TAKE-ALL CIRCUITS;

ERROR CORRECTION; MODULATION; NONVOLATILE STORAGE;

FLASH MEMORY;

EID: 84867293822     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2012.6292015     Document Type: Conference Paper

References (9)

1. P. Pavan, R. Bez, P. Olivo, and E. Zanoni, "Flash memory cells - an overview," in Proceedings of the IEEE, vol. 85, no. 8, Aug. 1997, pp. 1248-1271.
2. L. M. Grupp, J. D. Davis, and S. Swanson, "The bleak future of nand flash memory," in Proceedings of the USENIX, Feb. 2012.
3. S. Aritome, R. Shirota, G. Hemink, T. Endoh, and F. Masuoka, "Reliability issues of flash memory cells," in Proceedings of the IEEE, vol. 81, no. 5, 1993, pp. 776-788.
4. P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, "Flash memories," in Kluwer Academic Publishers, 1999.
5. B. Chen, X. Zhang, and Z. Wang, "Error correction for multi-level nand flash memory using reed-solomon codes," in IEEE Signal Processing Systems Workshop, Oct. 2008, pp. 94-99.
6. A. Jiang, R. Mateescu, M. Schwartz, and J. Bruck, "Rank modulation for flash memories," IEEE Transactions on Information Theory, vol. 55, no. 6, pp. 2659-2673, Jun. 2009.
7. -, "Rank modulation for flash memories," in IEEE International Symposium on Information Theory, 2008, pp. 1731-1735.
8. A. Fish, V. Milrud, and O. Yadid-Pecht, "High-speed and high-precision current qinner take-all circuit," IEEE Transactions on Circuits and Systems II, pp. 131-135, Mar. 2005.
9. A. Bandyopadhyay, G. Serrano, and P. Hasler, "Adaptive algorithm using hot-electron injection for programming analog computational memory elements within 0.2% of accuracy over 3.5 decades," IEEE Journal of Solid-State Circuits, vol. 41, no. 9, pp. 2107-2114, Sept. 2006.