-
2
-
-
47349100893
-
Package technology to address the memory bandwidth challenge for tera-scale computing
-
aug.
-
G. Hu, H. Kalyanam, S. Krishnamoorthy, and L. Polka, "Package technology to address the memory bandwidth challenge for tera-scale computing," Intel Technology Journal, vol. 11, no. 3, aug. 2007.
-
(2007)
Intel Technology Journal
, vol.11
, Issue.3
-
-
Hu, G.1
Kalyanam, H.2
Krishnamoorthy, S.3
Polka, L.4
-
3
-
-
78650018928
-
Compact ac modeling and performance analysis of through-silicon vias in 3-d ics
-
dec.
-
C. Xu, H. Li, R. Suaya, and K. Banerjee, "Compact ac modeling and performance analysis of through-silicon vias in 3-d ics," Electron Devices, IEEE Transactions on, vol. 57, no. 12, pp. 3405-3417, dec. 2010.
-
(2010)
Electron Devices, IEEE Transactions on
, vol.57
, Issue.12
, pp. 3405-3417
-
-
Xu, C.1
Li, H.2
Suaya, R.3
Banerjee, K.4
-
4
-
-
84941603444
-
Prediction of crosstalk in ribbon cables: Comparison of model predictions and experimental results
-
aug.
-
C. Paul, "Prediction of crosstalk in ribbon cables: Comparison of model predictions and experimental results," Electromagnetic Compatibility, IEEE Transactions on, vol. EMC-20, no. 3, pp. 394-406, aug. 1978.
-
(1978)
Electromagnetic Compatibility, IEEE Transactions on
, vol.EMC-20
, Issue.3
, pp. 394-406
-
-
Paul, C.1
-
5
-
-
57649110912
-
Multiconductor transmission line theory
-
Tech. Rep., RADC-TR-76-101, Rome Air Development Center, Griffiss AFB, NY, apr.
-
-, "Application of multiconductor transmission line theory to the prediction of cable coupling, vol. i., multiconductor transmission line theory," Tech. Rep., RADC-TR-76-101, Rome Air Development Center, Griffiss AFB, NY, apr. 1976.
-
(1976)
Application of Multiconductor Transmission Line Theory to the Prediction of Cable Coupling
, vol.1
-
-
Paul, C.1
-
6
-
-
80155176733
-
Modeling and analysis of through-silicon via (tsv) noise coupling and suppression using a guard ring
-
feb.
-
J. Cho, E. Song, K. Yoon, J. S. Pak, J. Kim, W. Lee, T. Song, K. Kim, J. Lee, H. Lee, K. Park, S. Yang, M. Suh, K. Byun, and J. Kim, "Modeling and analysis of through-silicon via (tsv) noise coupling and suppression using a guard ring," Components, Packaging and Manufacturing Technology, IEEE Transactions on, vol. 1, no. 2, pp. 220-233, feb. 2011.
-
(2011)
Components, Packaging and Manufacturing Technology, IEEE Transactions on
, vol.1
, Issue.2
, pp. 220-233
-
-
Cho, J.1
Song, E.2
Yoon, K.3
Pak, J.S.4
Kim, J.5
Lee, W.6
Song, T.7
Kim, K.8
Lee, J.9
Lee, H.10
Park, K.11
Yang, S.12
Suh, M.13
Byun, K.14
Kim, J.15
-
7
-
-
79959276395
-
Mitigating tsv-induced substrate noise in 3-d ics using gnd plugs
-
N. Khan, S. Alam, and S. Hassoun, "Mitigating tsv-induced substrate noise in 3-d ics using gnd plugs," in Quality Electronic Design (ISQED), 2011 12th International Symposium on, march 2011, pp. 1-6.
-
Quality Electronic Design (ISQED), 2011 12th International Symposium on, March 2011
, pp. 1-6
-
-
Khan, N.1
Alam, S.2
Hassoun, S.3
-
8
-
-
79957557009
-
Analytical heat transfer model for thermal through-silicon vias
-
H. Xu, V. Pavlidis, and G. De Micheli, "Analytical heat transfer model for thermal through-silicon vias," in Design, Automation Test in Europe Conference Exhibition (DATE), 2011, march 2011, pp. 1-6.
-
Design, Automation Test in Europe Conference Exhibition (DATE), 2011, March 2011
, pp. 1-6
-
-
Xu, H.1
Pavlidis, V.2
De Micheli, G.3
-
9
-
-
74549171498
-
Through silicon via (tsv) equalizer
-
J. Kim, E. Song, J. Cho, J. S. Pak, J. Lee, H. Lee, K. Park, and J. Kim, "Through silicon via (tsv) equalizer," in Electrical Performance of Electronic Packaging and Systems, 2009. EPEPS '09. IEEE 18th Conference on, oct. 2009, pp. 13-16.
-
Electrical Performance of Electronic Packaging and Systems, 2009. EPEPS '09. IEEE 18th Conference on, Oct. 2009
, pp. 13-16
-
-
Kim, J.1
Song, E.2
Cho, J.3
Pak, J.S.4
Lee, J.5
Lee, H.6
Park, K.7
Kim, J.8
-
10
-
-
79960780734
-
Stress characterization of tungsten-filled through silicon via arrays using very high resolution multi-wavelength raman spectroscopy
-
[Online]. Available
-
J. Gambino, D. Vanslette, B. Webb, C. Luce, T. Ueda, T. Ishigaki, K. Kang, and W. S. Yoo, "Stress characterization of tungsten-filled through silicon via arrays using very high resolution multi-wavelength raman spectroscopy," ECS Transactions, vol. 35, no. 2, pp. 105-115, 2011. [Online]. Available: http://link.aip.org/link/abstract/ECSTF8/v35/i2/p105/s1
-
(2011)
ECS Transactions
, vol.35
, Issue.2
, pp. 105-115
-
-
Gambino, J.1
Vanslette, D.2
Webb, B.3
Luce, C.4
Ueda, T.5
Ishigaki, T.6
Kang, K.7
Yoo, W.S.8
-
11
-
-
0024866268
-
The 3-d computer
-
M. Little, R. Etchells, J. Grinberg, S. Laub, J. Nash, and M. Yung, "The 3-d computer," in Wafer Scale Integration, 1989. Proceedings., [1st] International Conference on, jan 1989, pp. 55-64.
-
Wafer Scale Integration, 1989. Proceedings., [1st] International Conference on, Jan 1989
, pp. 55-64
-
-
Little, M.1
Etchells, R.2
Grinberg, J.3
Laub, S.4
Nash, J.5
Yung, M.6
|