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Volumn , Issue , 2012, Pages 1604-1607

Memristor circuit for artificial synaptic weighting of pulse inputs

Author keywords

[No Author keywords available]

Indexed keywords

BRIDGE STRUCTURES; LOW POWER; MEMRISTOR; NEURAL CELLS; NON-VOLATILE; PULSE INPUT; TIME SLOTS; TIO; WEIGHT SETTING;

EID: 84866601847     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271560     Document Type: Conference Paper
Times cited : (17)

References (11)
  • 2
    • 0024088955 scopus 로고
    • Cellular neural networks: Theory
    • Oct.
    • L. O. chua and L. Yang,"Cellular neural networks: Theory," IEEE Trans. Circuits and Syst. , vol. 35, no. 10, pp. 1257-1272, Oct. 1988.
    • (1988) IEEE Trans. Circuits and Syst. , vol.35 , Issue.10 , pp. 1257-1272
    • Chua, L.O.1    Yang, L.2
  • 4
    • 0015127532 scopus 로고
    • Memristor-the missing circuit element
    • Sep.
    • L. O. Chua,"Memristor-the missing circuit element," IEEE Trans. Circuit Theory vol. CT-18, no. 5, pp. 507-519, Sep. 1971.
    • (1971) IEEE Trans. Circuit Theory Vol. CT-18 , Issue.5 , pp. 507-519
    • Chua, L.O.1
  • 5
    • 0016918810 scopus 로고
    • Memristive devices and systems
    • Feb.
    • L. O. Chua and S. M Kang,"Memristive devices and systems," Proc. of IEEE, vol. 64, no. 2, pp. 209-223, Feb. 1976.
    • (1976) Proc. of IEEE , vol.64 , Issue.2 , pp. 209-223
    • Chua, L.O.1    Kang, S.M.2
  • 7
    • 34548685897 scopus 로고    scopus 로고
    • Self-organized computation with unreliable, memristive nanodevices
    • G. Snider,"Self-organized computation with unreliable, memristive nanodevices," Nanotechnology, vol. 18, no. 36, pp. 1-13, 2007.
    • (2007) Nanotechnology , vol.18 , Issue.36 , pp. 1-13
    • Snider, G.1
  • 9


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.