High-resolution multi-bit second-order incremental converter with 1.5-μV residual offset and 94-dB SFDR

Analog Integrated Circuits and Signal Processing

Volumn 72, Issue 3, 2012, Pages 531-539

  Agnes, Andrea ^a,b   Bonizzoni, Edoardo ^a   Maloberti, Franco ^a  

^a UNIVERSITY OF PAVIA   (Italy)

^b Elpida Memory   (Italy)

Author keywords

Analog to digital conversion; CMOS analog integrated circuits; Sigma delta modulation

Indexed keywords

CLOCK PERIOD; CMOS ANALOG INTEGRATED CIRCUITS; CMOS TECHNOLOGY; FULLY DIFFERENTIAL; HIGH RESOLUTION; MULTI-BITS; NOVEL TECHNIQUES; OFFSET CANCELLATION; SECOND ORDERS;

CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; LINEAR INTEGRATED CIRCUITS;

DIGITAL INTEGRATED CIRCUITS;

EID: 84865153273     PISSN: 09251030     EISSN: 15731979     Source Type: Journal    
DOI: 10.1007/s10470-011-9752-0     Document Type: Conference Paper

References (7)

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