On the design of incremental ΣΔ converters

2007 IEEE North-East Workshop on Circuits and Systems, NEWCAS 2007

Volumn , Issue , 2007, Pages 1376-1379

  Belloni, M ^a   Della Fiore, C ^a   Maloberti, F ^a   Andrade, M García ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE COMPONENTS; DESIGN TECHNIQUES; FINITE GAIN; MULTI-BIT QUANTIZERS;

SIGNAL PROCESSING;

EID: 50049125685     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NEWCAS.2007.4488019     Document Type: Conference Paper

References (5)

1. J. Markus, J. Silva, and G. C. Temes, "Theory and applications of incremental σΔ converters," IEEE Transactions on Circuits And SystemsI: Regular Papers, vol. 51. pp. 678-690, April 2004.
2. V. Quiquempoix, P. Deval, A. Barreto. G. Bellini, J. Markus, J. Silva, and G. C. Temes, "A low-power 22-bit incremental ADC," IEEE Journal of Solid-State Circuits, vol. 41, pp. 1562-1571. July 2006.
3. C. Lyden, C. A. Ugarte, J. Kornblum. and F. M. Yung, "A single shot sigma-delta analog-to-digital converter for multiplexed application," in Proc. IEEE Custom Integrated Circuits Conference, (Santa Clara CA), pp. 203-206, May 1-4 1995.
4. J. Robert and P. Deval, "A second-order high-resolution incremental A/D converter with offset and charge injection compensation," IEEE Journal of Solid-State Circuits, vol. 23, pp. 736-741, June 1988.
5. C. C. Enz and G. C. Temes. "Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization," Procc IEEE. vol. 84, pp. 1584-1614, Nov 1996.