Platform-aware bottleneck detection for reconfigurable computing applications

ACM Transactions on Reconfigurable Technology and Systems

Volumn 4, Issue 3, 2011, Pages

  Koehler, Seth ^a   Stitt, Greg ^a   George, Alan D ^a  

^a University of Florida   (United States)

Author keywords

FPGA; Optimization; Performance analysis

Indexed keywords

BOTTLENECK DETECTION; EXPERIMENTAL PERFORMANCE ANALYSIS; KNOWLEDGE BASE; OPTIMIZATION STRATEGY; PERFORMANCE ANALYSIS; PERFORMANCE BENEFITS; RE-CONFIGURABLE COMPUTING APPLICATIONS; RECONFIGURABLE COMPUTING;

INSPECTION; KNOWLEDGE BASED SYSTEMS; OPTIMIZATION; PROGRAM PROCESSORS; RECONFIGURABLE ARCHITECTURES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84864923010     PISSN: 19367406     EISSN: 19367414     Source Type: Journal    
DOI: 10.1145/2000832.2000842     Document Type: Article

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