Scaling challenges in NAND flash device toward 10nm technology

2012 4th IEEE International Memory Workshop, IMW 2012

Volumn , Issue , 2012, Pages

  Lee, Seokkiu ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL ISSUES; DRIVING FORCES; FLOATING GATE TECHNOLOGY; FLOATING GATES; MARKET GROWTH; NAND FLASH; NAND FLASH MEMORY;

EID: 84864124427     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2012.6213636     Document Type: Conference Paper

References (6)

1. S. Hong, "Memory Technology Trend and Future Challenges", IEEE IEDM Technical Digest, pp 292-295, 2010.
2. S.J. Whang et al, "A Novel 3-Dimensional Dual Control-Gate with Surrounding Floating-Gate(DC-SF) NAND Flash Cell", IEEE IEDM Technical Digest, pp 668-671, 2010.
3. H. Tanaka et al., "Pipe-shaped BiCS Flash Memory with 16 Stacked Layers and Multi-Level-Cell Operation for Ultra High Density Storage Devices", Symposium on VLSI Technology Digest of Technical, pp 136-137, 2009.
4. J.H. Jang et al., "Vertical Cell Array using TCAT(Terabit Cell Array Transistor) Technology for Ultra High Density NAND Flash Memory TCAT", Symposium on VLSI Technology Digest, pp 192-193, 2009.
5. K. W. Lee et al., "A Highly Manufacturable Integration Technology of 20nm Generation 64Gb Multi-Level NAND Flash Memory", Symposium on VLSI Technology Digest of Technical, pp 70-71, 2011.
6. J. Hwang et al., "A mid-1x nm NAND Flash Memory Cell with a Highly Manufacturable Integration Technology", IEEE IEDM Technical Digest, pp 199-202, 2011.