Verification of pipelined microprocessors by comparing memory execution sequences in symbolic simulation

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1345, Issue , 1997, Pages 18-31

  Bryant, Randal E ^a   Velev, Miroslav N ^b  

^a Robotics Institute   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Circuit correspondence checking; Efficient Memory Model (EMM); Memory shadowing; Pipelined microprocessor verification; Symbolic simulation

Indexed keywords

RECONFIGURABLE HARDWARE;

CORRESPONDENCE CHECKING; EFFICIENT MEMORY MODELING; EXECUTION SEQUENCES; MEMORY MODELING; MICROPROCESSOR VERIFICATION; PIPELINED CIRCUITS; SYMBOLIC SIMULATION; VERIFICATION METHOD;

MODEL CHECKING;

EID: 84863616097     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63875-X_40     Document Type: Conference Paper

References (14)

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