-
1
-
-
65849528344
-
Gridded design rule scaling: Taking the CPU toward the 16nm node
-
C. Bencher, H. X. Dai and Y. M. Chen, "Gridded design rule scaling: taking the CPU toward the 16nm node", Proc. SPIE 7274, 72740G (2009).
-
(2009)
Proc. SPIE
, vol.7274
-
-
Bencher, C.1
Dai, H.X.2
Chen, Y.M.3
-
2
-
-
34948854470
-
Polymer self-assembly in semiconductor microelectronics
-
C. T. Black et al., "Polymer self-assembly in semiconductor microelectronics", IBM Journal of Research and Development 51, 605- 633 (2007).
-
(2007)
IBM Journal of Research and Development
, vol.51
, pp. 605-633
-
-
Black, C.T.1
-
3
-
-
33646703470
-
Block copolymer lithography: Merging "bottom-up" with "top-down" processes
-
C. J. Hawker, T. P. Russell, "Block copolymer lithography: Merging "bottom-up" with "top-down" processes", Mrs Bulletin 30, 952-966 (2005).
-
(2005)
Mrs Bulletin
, vol.30
, pp. 952-966
-
-
Hawker, C.J.1
Russell, T.P.2
-
4
-
-
79951846246
-
Experimental Demonstration of Aperiodic Patterns of Directed Self-Assembly by Block Copolymer Lithography for Random Logic Circuit Layout
-
L.-W. Chang, X.-Y. Bao, C. Bencher, H.-S. P. Wong, "Experimental Demonstration of Aperiodic Patterns of Directed Self-Assembly by Block Copolymer Lithography for Random Logic Circuit Layout", Proc. IEDM, p. 752-755 (2010).
-
(2010)
Proc. IEDM
, pp. 752-755
-
-
Chang, L.-W.1
Bao, X.-Y.2
Bencher, C.3
Wong, H.-S.P.4
-
5
-
-
77953307294
-
Self-assembling materials for lithographic patterning: Overview, status, and moving forward
-
W. Hinsberg, J. Cheng, H. C. Kim and D. P. Sanders, "Self-assembling materials for lithographic patterning: overview, status, and moving forward", Proc. SPIE 7637, 76370G (2010).
-
(2010)
Proc. SPIE
, vol.7637
-
-
Hinsberg, W.1
Cheng, J.2
Kim, H.C.3
Sanders, D.P.4
-
6
-
-
68549111276
-
SCFT Simulations of Thin Film Blends of Block Copolymer and Homopolymer Laterally Confined in a Square Well
-
S.-M. Hur, C. J. Garcia-Cervera, E. J. Kramer, G. H. Fredrickson, "SCFT Simulations of Thin Film Blends of Block Copolymer and Homopolymer Laterally Confined in a Square Well", Macromolecules 42, 5861-5872 (2009).
-
(2009)
Macromolecules
, vol.42
, pp. 5861-5872
-
-
Hur, S.-M.1
Garcia-Cervera, C.J.2
Kramer, E.J.3
Fredrickson, G.H.4
-
7
-
-
83855163176
-
High performance 32nm logic technology featuring 2nd generation high-k + metal gate transistors
-
P. Packan et al., "High performance 32nm logic technology featuring 2nd generation high-k + metal gate transistors", Proc. IEDM, p. 659 (2009).
-
(2009)
Proc. IEDM
, pp. 659
-
-
Packan, P.1
-
8
-
-
65849167245
-
22 nm Technology Compatible Fully Functional 0.1 μm2 6T-SRAM Cell
-
Haran, B. S. et al., "22 nm Technology Compatible Fully Functional 0.1 μm2 6T-SRAM Cell", Proc. IEDM, p.625-628 (2008).
-
(2008)
Proc. IEDM
, pp. 625-628
-
-
Haran, B.S.1
-
9
-
-
79959294835
-
25nm 64Gb MLC NAND technology and scaling challenges
-
K. Prall, K. Parat, "25nm 64Gb MLC NAND technology and scaling challenges", Proc. IEDM, p. 102 (2010).
-
(2010)
Proc. IEDM
, pp. 102
-
-
Prall, K.1
Parat, K.2
-
10
-
-
79959187556
-
Mandrel-based patterning: Density multiplication techniques for 15nm nodes
-
C. Bencher et al., "Mandrel-based patterning: density multiplication techniques for 15nm nodes", Proc. SPIE 7973, 79730K (2011).
-
(2011)
Proc. SPIE
, vol.7973
-
-
Bencher, C.1
|