-
1
-
-
0015127532
-
Memristor-the missing circuit element
-
Sep
-
L. O. Chua, "Memristor-the missing circuit element," IEEE Trans. Circuit Theory, vol. 18, no. 5, pp. 507-519, Sep. 1971.
-
(1971)
IEEE Trans. Circuit Theory
, vol.18
, Issue.5
, pp. 507-519
-
-
Chua, L.O.1
-
2
-
-
77950852717
-
'Memristive' switches enable 'stateful' logic operations via material implication
-
Apr
-
J. Borghetti, G. S. Snider, P. J. Kuekes, J. J. Yang, D. R. Stewart, and R. S. Williams, "'Memristive' switches enable 'stateful' logic operations via material implication," Nature, vol. 464, pp. 873-876, Apr. 2010.
-
(2010)
Nature
, vol.464
, pp. 873-876
-
-
Borghetti, J.1
Snider, G.S.2
Kuekes, P.J.3
Yang, J.J.4
Stewart, D.R.5
Williams, R.S.6
-
3
-
-
76249096489
-
Two memristors suffice to compute all Boolean functions
-
E. Lehtonen, J. H. Poikonen, and M. Laiho, "Two memristors suffice to compute all Boolean functions," IET Electron. Lett., vol. 46, no. 3, p. 239, 2010.
-
(2010)
IET Electron. Lett.
, vol.46
, Issue.3
, pp. 239
-
-
Lehtonen, E.1
Poikonen, J.H.2
Laiho, M.3
-
5
-
-
80055020443
-
Neuromorphic, digital and quantum computation with memory circuit elements
-
to be published
-
Y. V. Pershin and M. Di Ventra, "Neuromorphic, digital and quantum computation with memory circuit elements," Proc. IEEE, to be published.
-
Proc. IEEE
-
-
Pershin, Y.V.1
Di Ventra, M.2
-
6
-
-
79851501719
-
Memory effects in complex materials and nanoscale systems
-
Y. V. Pershin and M. Di Ventra, "Memory effects in complex materials and nanoscale systems," Adv. Phys., vol 60, no. 2, pp. 145-227, 2011.
-
(2011)
Adv. Phys.
, vol.60
, Issue.2
, pp. 145-227
-
-
Pershin, Y.V.1
Di Ventra, M.2
-
7
-
-
77955992982
-
Cellular nanoscale network cell with memristors for local implication logic and synapses
-
May-Jun
-
M. Laiho and E. Lehtonen, "Cellular nanoscale network cell with memristors for local implication logic and synapses," in Proc. IEEE ISCAS, May-Jun. 2010, pp. 2051-2054.
-
(2010)
Proc. IEEE ISCAS
, pp. 2051-2054
-
-
Laiho, M.1
Lehtonen, E.2
-
8
-
-
79960747192
-
Stateful logic pipeline architecture
-
May
-
K. Kim, S. Shin, and S.-M. Kang, "Stateful logic pipeline architecture," in Proc. IEEE ISCAS, May 2011, pp. 2497-2500.
-
(2011)
Proc. IEEE ISCAS
, pp. 2497-2500
-
-
Kim, K.1
Shin, S.2
Kang, S.-M.3
-
9
-
-
0000718899
-
The map method for synthesis of combinational logic circuits
-
M. Karnaugh, "The map method for synthesis of combinational logic circuits," Trans. AIEE Commun. Electron., vol. 72, no. 1, pp. 593-598, 1953.
-
(1953)
Trans. AIEE Commun. Electron.
, vol.72
, Issue.1
, pp. 593-598
-
-
Karnaugh, M.1
-
10
-
-
33845331515
-
Minimization of Boolean functions
-
E. J. McCluskey, "Minimization of Boolean functions," Bell Syst. Tech. J., vol. 35, no. 5, pp. 1417-1444, 1956.
-
(1956)
Bell Syst. Tech. J.
, vol.35
, Issue.5
, pp. 1417-1444
-
-
McCluskey, E.J.1
-
11
-
-
79960884576
-
Time-dependency of the threshold voltage in memristive devices
-
May
-
E. Lehtonen, J. H. Poikonen, M. Laiho, and W. Lu, "Time-dependency of the threshold voltage in memristive devices," in Proc. IEEE ISCAS, May 2011, pp. 2245-2248.
-
(2011)
Proc. IEEE ISCAS
, pp. 2245-2248
-
-
Lehtonen, E.1
Poikonen, J.H.2
Laiho, M.3
Lu, W.4
-
13
-
-
77955720869
-
Memristor based programmable threshold logic array
-
Jun
-
J. Rajendran, H. Manem, R. Karri, and G. S. Rose, "Memristor based programmable threshold logic array," in Proc. IEEE/ACM Int. Symp. Nanoscale Architectures, Jun. 2010, pp. 5-10.
-
(2010)
Proc. IEEE/ACM Int. Symp. Nanoscale Architectures
, pp. 5-10
-
-
Rajendran, J.1
Manem, H.2
Karri, R.3
Rose, G.S.4
|