Stateful logic pipeline architecture

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2011, Pages 2497-2500

  Kim, Kyosun ^a   Shin, Sangho ^b   Kang, Sung Mo ^b  

^a SolarLight Ltd   (South Korea)

^b Merced   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BASIC OPERATION; DATA SYNCHRONIZATION; DATA-FORWARDING; DESIGN PARADIGM; FAN OUT; LOGIC REPRESENTATION; LOGIC UNIT; MULTIPLE OPERATIONS; NOR GATES; PIPELINE ARCHITECTURE; PROGRAMMABLE INTERCONNECTS; PROPOSED ARCHITECTURES;

ARCHITECTURE; FLIP FLOP CIRCUITS; MEMORY ARCHITECTURE; PIPELINES;

LOGIC CIRCUITS;

EID: 79960747192     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2011.5938111     Document Type: Conference Paper

References (9)

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