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Volumn , Issue , 2012, Pages 57-65
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LDPC decoding on the Intel SCC
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Author keywords
[No Author keywords available]
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Indexed keywords
COMMUNICATION STANDARDS;
DECODING ALGORITHM;
DISTRIBUTED MEMORY;
ERROR CORRECTING CODE;
ERROR PROBABILITIES;
LOW-DENSITY PARITY-CHECK (LDPC) CODES;
MANY-CORE;
NOISY CHANNEL;
PARALLELIZATIONS;
RESEARCH LABS;
SHARED MEMORIES;
SHARED MEMORY MODEL;
SINGLE-CHIP;
TRANSMIT DATA;
CORE LEVELS;
DECODING;
FORWARD ERROR CORRECTION;
WIMAX;
MICROPROCESSOR CHIPS;
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EID: 84862130077
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/PDP.2012.79 Document Type: Conference Paper |
Times cited : (2)
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References (15)
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