A new model for through-silicon vias on 3-D IC using conformal mapping method

IEEE Microwave and Wireless Components Letters

Volumn 22, Issue 6, 2012, Pages 303-305

  Cheng, Tai Yu ^a   Wang, Chuen De ^a   Chiou, Yih Peng ^a   Wu, Tzong Lin ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

3 D integrated circuits; Conformal mapping; equivalent circuit model; through silicon via (TSV)

Indexed keywords

3-D INTEGRATED CIRCUIT; CLOSED-FORM FORMULAE; CONFORMAL MAPPING METHOD; CONFORMAL MAPPING TECHNIQUE; ELECTRICAL PERFORMANCE; EQUIVALENT CIRCUIT MODEL; FULL-WAVE SIMULATIONS; GEOMETRICAL PARAMETERS; NEW MODEL; PARALLEL CAPACITANCE; PITCH-TO-DIAMETER RATIOS; PROXIMITY EFFECTS; RESISTANCE AND INDUCTANCE; THROUGH SILICON VIAS; THROUGH-SILICON VIA (TSV);

CONFORMAL MAPPING; ELECTRONICS PACKAGING;

THREE DIMENSIONAL;

EID: 84862019957     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2012.2195776     Document Type: Article

References (7)

1. J. P. Quine, H. F.Webster,H.H. Glascock, II, and R. O. Carlson, "Characterization of via connections in silicon circuit boards," IEEE Trans. Microw. Theory Tech., vol. 36, no. 1, pp. 21-27, Jan. 1988.
2. C. Ryu, J. Lee, H. Lee, K. Lee, T. Oh, and J. Kim, "High frequency electrical model of through wafer via for 3-D stacked chip packaging," in Proc. IEEE Electro. Sys. Integration Tech. Conf., Dresden, Germany, Sep. 2006, pp. 215-220. (Pubitemid 351576621)
3. J. Pak, J. Cho, J. Kim, J. Lee, H. Lee, K. Park, and J. Kim, "Slow wave and dielectric quasi-TEM modes of metal-insulator-semiconductor (MIS) structure through silicon via (TSV) in signal propagation and power delivery in 3D chip package," in Proc. IEEE Electron. Comp. Tech. Conf., Las Vegas, NV, Jun. 1-4, 2010, pp. 667-672.
4. C. Xu, H. Li, R. Suaya, and K. Banerjee, "Compact AC modeling and performance analysis of through-silicon vias in 3-D ICs," IEEE Trans. Electron Devices, vol. 57, no. 12, pp. 3405-3417, Dec. 2010.
5. E.-X. Liu, E. P. Li, W.-B. Ewe, H. M. Lee, T. G. Lim, and S. Gao, "Compact wideband equivalent circuit model for electrical modeling of Through-silicon via," IEEE Trans. Microw. Theory Tech., vol. 59, no. 6, pp. 1454-1460, Mar. 2011.
6. R. W. Churchill and J. W. Brown, Complex Variable&Applications. : McGraw-Hill, 1984, p. 329.
7. A. Bansal, B. Paul, and K. Roy, "An analytical fringe capacitance model for interconnects using conformal mapping," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 25, no. 12, pp. 2765-2774, Dec. 2006. (Pubitemid 44950667)