A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 55, Issue , 2012, Pages 324-325

  Bulzacchelli, John ^a   Beukema, Troy ^a   Storaska, Daniel ^b   Hsieh, Ping Hsuan ^a,c   Rylov, Sergey ^a   Furrer, Daniel ^d   Gardellini, Daniele ^d   Prati, Andrea ^d   Menolfi, Christian ^e   Hanson, David ^b   Hertle, Juergen ^d   Morf, Thomas ^e   Sharma, Vivek ^d   Kelkar, Ram ^b   Ainspan, Herschel ^a   Kelly, William ^b   Ritter, Glenn ^b   Garlett, Jon ^b   Callan, Robert ^b   Toifl, Thomas ^e   Friedman, Daniel ^a   more..

^a IBM RESEARCH   (United States)

^b IBM   (United States)

^c NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^d Miromico   (Switzerland)

^e IBM RESEARCH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE FEEDBACK; DATA RATES; DEVICE SPEED; FULLY INTEGRATED; I/O SYSTEMS; LEVEL SHIFTER; PARALLEL PATH; SERIAL LINK; SERIAL-LINK TRANSCEIVER; SOI CMOS;

CMOS INTEGRATED CIRCUITS;

TRANSCEIVERS;

EID: 84860657238     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2012.6177031     Document Type: Conference Paper

References (5)

1. A. K. Joy et al., "Analog-DFE-Based 16Gb/s SerDes in 40nm CMOS That Operates Across 34dB Loss Channels at Nyquist with a Baud Rate CDR and 1.2Vpp Voltage-Mode Driver," ISSCC Dig. Tech. Papers, pp. 350-351, Feb. 2011.
2. S. Quan et al., "A 1.0625-to-14.025Gb/s Multimedia Transceiver with Fullrate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40nm CMOS," ISSCC Dig. Tech. Papers, pp. 348-349, Feb. 2011.
3. G. R. Gangasani et al., "A 16-Gb/s Backplane Transceiver with 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology," Proc. CICC, Sept. 2011.
4. C. Menolfi et al., "A 28Gb/s Source-Series Terminated TX in 32nm CMOS SOI," ISSCC Dig. Tech. Papers, pp. 334-335, Feb. 2012.
5. S. Galal and B. Razavi, "10-Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18-μm CMOS Technology," IEEE J. Solid-State Circuits, vol. 38, pp. 2138-2146, Dec. 2003.