Isolation techniques against substrate noise coupling utilizing through silicon via (TSV) process for RF/mixed-signal SoCs

IEEE Journal of Solid-State Circuits

Volumn 47, Issue 4, 2012, Pages 810-816

  Uemura, Shinichiro ^a   Hiraoka, Yukio ^a   Kai, Takayuki ^a   Dosho, Shiro ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

Deep trench isolation (DTI); high resistive substrate; isolation technique; RF mixed signal SoC; substrate noise coupling; through silicon via (TSV)

Indexed keywords

DEEP TRENCH ISOLATION; ISOLATION TECHNIQUES; RESISTIVE SUBSTRATES; RF/MIXED-SIGNAL SOC; SUBSTRATE NOISE COUPLING; THROUGH-SILICON-VIA;

DIGITAL CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; TENSORS; VLSI CIRCUITS;

SUBSTRATES;

EID: 84859708021     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2012.2185169     Document Type: Conference Paper

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