-
3
-
-
79960321311
-
Trace-driven cache attacks on AES
-
Lecture Notes in Computer Science Series
-
ACIIÇMEZ, O. AND KOÇ, Ç. 2006. Trace-driven cache attacks on AES. In Information and Communications Security. Lecture Notes in Computer Science Series, vol. 4307, 112-121.
-
(2006)
Information and Communications Security
, vol.4307
, pp. 112-121
-
-
Aciiçmez, O.1
Koç, C.2
-
4
-
-
84876307879
-
On the power of simple branch prediction analysis
-
ACIIÇMEZ, O., KOÇ, Ç., AND SEIFERT, J.-P. 2007a. On the power of simple branch prediction analysis. In Proceedings of the 2nd ACM Symposium on Information, Computer and Communications Security (ASIACCS'07). 312-320.
-
(2007)
Proceedings of the 2nd ACM Symposium on Information, Computer and Communications Security (ASIACCS'07)
, pp. 312-320
-
-
Aciiçmez, O.1
Koç, C.2
Seifert, J.-P.3
-
5
-
-
84944627047
-
Predicting secret keys via branch prediction
-
ACIIÇMEZ, O., KOÇ, Ç., AND SEIFERT, J.-P. 2007b. Predicting secret keys via branch prediction. In Topics in Cryptology, the Cryptographers Track at the RSA Conference (CT-RSA'07). 225-242.
-
(2007)
Topics in Cryptology, the Cryptographers Track at the RSA Conference (CT-RSA'07)
, pp. 225-242
-
-
Aciiçmez, O.1
Koç, C.2
Seifert, J.-P.3
-
6
-
-
85022027006
-
Cache based remote timing attack on the AES
-
ACIIÇMEZ, O., SCHINDLER, W., AND KOÇ, Ç . 2007. Cache based remote timing attack on the AES. In Topics in Cryptology, The Cryptographers Track at the RSA Conference (CT-RSA'07). 271-286.
-
(2007)
Topics in Cryptology, the Cryptographers Track at the RSA Conference (CT-RSA'07)
, pp. 271-286
-
-
Aciiçmez, O.1
Schindler, W.2
Koç, C.3
-
8
-
-
79959939223
-
Mutual information analysis: A comprehensive study
-
BATINA, L., GIERLICHS, B., PROUFF, E., RIVAIN, M., STANDAERT, F.-X., AND VEYRAT-CHARVILLON, N. 2011. Mutual information analysis: a comprehensive study. J. Cryptology 24, 2, 269-291.
-
(2011)
J. Cryptology
, vol.24
, Issue.2
, pp. 269-291
-
-
Batina, L.1
Gierlichs, B.2
Prouff, E.3
Rivain, M.4
Standaert, F.-X.5
Veyrat-Charvillon, N.6
-
9
-
-
80052670809
-
A first step towards automatic application of power analysis countermeasures
-
BAYRAK, A. G., REGAZZONI, F., BRISK, P., STANDAERT, F.-X., AND IENNE, P. 2011. A first step towards automatic application of power analysis countermeasures. In Proceedings of the 48th Design Automation Conference (DAC'11). 230-235.
-
(2011)
Proceedings of the 48th Design Automation Conference (DAC'11)
, pp. 230-235
-
-
Bayrak, A.G.1
Regazzoni, F.2
Brisk, P.3
Standaert, F.-X.4
Ienne, P.5
-
10
-
-
33744529805
-
Cache-timing attacks on AES
-
The University of Illinois at Chicago
-
BERNSTEIN, D. J. 2005. Cache-timing attacks on AES. Tech. rep., The University of Illinois at Chicago.
-
(2005)
Tech. Rep.
-
-
Bernstein, D.J.1
-
12
-
-
38549138136
-
Software mitigations to hedge AES against cache-based software side channel vulnerabilities
-
rep. 2006/052
-
BRICKELL, E., GRAUNKE, G., NEVE, M., AND SEIFERT, J.-P. 2006. Software mitigations to hedge AES against cache-based software side channel vulnerabilities. Cryptology ePrint Archive, rep. 2006/052.
-
(2006)
Cryptology EPrint Archive
-
-
Brickell, E.1
Graunke, G.2
Neve, M.3
Seifert, J.-P.4
-
15
-
-
18844454571
-
Remote timing attacks are practical
-
DOI 10.1016/j.comnet.2005.01.010, PII S1389128605000125, Web Traffic
-
BRUMLEY, D. AND BONEH, D. 2005. Remote timing attacks are practical. Computer Netw. 48, 5, 701-716. (Pubitemid 40684158)
-
(2005)
Computer Networks
, vol.48
, Issue.5
, pp. 701-716
-
-
Brumley, D.1
Boneh, D.2
-
16
-
-
70449663138
-
Improvements in the Intel Core 2 processor family architecture and microarchitecture
-
COKE, J., BALIG, H., COORAY, N., GAMSARAGAN, E., SMITH, P., YOON, K., ABEL, J., AND VALLES, A. 2008. Improvements in the Intel Core 2 processor family architecture and microarchitecture. Intel Technol. J. 12, 3, 179-192.
-
(2008)
Intel Technol. J.
, vol.12
, Issue.3
, pp. 179-192
-
-
Coke, J.1
Balig, H.2
Cooray, N.3
Gamsaragan, E.4
Smith, P.5
Yoon, K.6
Abel, J.7
Valles, A.8
-
17
-
-
70449623154
-
Practical mitigations for timingbased side-channel attacks on modern x86 processors
-
COPPENS, B., VERBAUWHEDE, I., DE BOSSCHERE, K., AND DE SUTTER, B. 2009. Practical mitigations for timingbased side-channel attacks on modern x86 processors. In Proceedings of the 30th IEEE Symposium on Security and Privacy (S&P'09). 45-60.
-
(2009)
Proceedings of the 30th IEEE Symposium on Security and Privacy (S&P'09)
, pp. 45-60
-
-
Coppens, B.1
Verbauwhede, I.2
De Bosschere, K.3
De Sutter, B.4
-
18
-
-
60349110770
-
Opportunities and limits of remote timing attacks
-
CROSBY, S. A., WALLACH, D. S., AND RIEDI, R. H. 2009. Opportunities and limits of remote timing attacks. ACM Trans. Info. Syst. Sec. 12, 3, 17:1-17:29.
-
(2009)
ACM Trans. Info. Syst. Sec.
, vol.12
, Issue.3
, pp. 1701-1729
-
-
Crosby, S.A.1
Wallach, D.S.2
Riedi, R.H.3
-
19
-
-
0038110492
-
A practical implementation of the timing attack
-
DHEM, J.-F., KOEUNE, F., LEROUX, P.-A., MESTRÉ, P., QUISQUATER, J.-J., AND WILLEMS, J.-L. 1998. A practical implementation of the timing attack. In Proceedings of the International Conference on Smart Card Research and Applications (CARDIS'98). 167-182.
-
(1998)
Proceedings of the International Conference on Smart Card Research and Applications (CARDIS'98)
, pp. 167-182
-
-
Dhem, J.-F.1
Koeune, F.2
Leroux, P.-A.3
Mestré, P.4
Quisquater, J.-J.5
Willems, J.-L.6
-
21
-
-
79955893580
-
Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs
-
Copenhagen University of Engineering
-
FOG, A. 2011. Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs. Tech. rep., Copenhagen University of Engineering.
-
(2011)
Tech. Rep.
-
-
Fog, A.1
-
22
-
-
42149194967
-
Statistically rigorous java performance evaluation
-
GEORGES, A., BUYTAERT, D., AND EECKHOUT, L. 2007. Statistically rigorous java performance evaluation. SIGPLAN Notices 42, 10, 57-76.
-
(2007)
SIGPLAN Notices
, vol.42
, Issue.10
, pp. 57-76
-
-
Georges, A.1
Buytaert, D.2
Eeckhout, L.3
-
23
-
-
51049117070
-
Mutual information analysis
-
GIERLICHS, B., BATINA, L., TUYLS, P., AND PRENEEL, B. 2008. Mutual information analysis. In Proceedings of the 10th International Workshop on Cryptographic Hardware and Embedded Systems (CHES'08). 426-442.
-
(2008)
Proceedings of the 10th International Workshop on Cryptographic Hardware and Embedded Systems (CHES'08)
, pp. 426-442
-
-
Gierlichs, B.1
Batina, L.2
Tuyls, P.3
Preneel, B.4
-
24
-
-
85044043849
-
Instruction latencies and throughput for AMD and Intel x86 processors
-
GRANLUND, T. 2011. Instruction latencies and throughput for AMD and Intel x86 processors. Tech. rep.
-
(2011)
Tech. Rep
-
-
Granlund, T.1
-
25
-
-
77954603989
-
Side channel analysis of cryptographic software via early-terminating multiplications
-
GROSZSCHAEDL, J., OSWALD, E., PAGE, D., AND TUNSTALL, M. 2009. Side channel analysis of cryptographic software via early-terminating multiplications. In Proceedings of the 12th International Conference on Information Security and Cryptology (ICISC'09). 176-192.
-
(2009)
Proceedings of the 12th International Conference on Information Security and Cryptology (ICISC'09)
, pp. 176-192
-
-
Groszschaedl, J.1
Oswald, E.2
Page, D.3
Tunstall, M.4
-
26
-
-
84857853559
-
Towards side-channel resistant block cipher usage or can we encrypt without side-channel countermeasures
-
rep. 2010/015
-
GUAJARDO, J. AND MENNINK, B. 2010. Towards side-channel resistant block cipher usage or can we encrypt without side-channel countermeasures. Cryptology ePrint Archive, rep. 2010/015.
-
(2010)
Cryptology EPrint Archive
-
-
Guajardo, J.1
Mennink, B.2
-
27
-
-
64949133467
-
Advanced encryption standard (AES) instructions set
-
Intel Mobility Group
-
GUERON, S. 2008. Advanced encryption standard (AES) instructions set. Tech. rep., Intel Mobility Group.
-
(2008)
Tech. Rep.
-
-
Gueron, S.1
-
28
-
-
84857870978
-
Cache games - Bringing access based cache attacks on aes to practice
-
rep. 2010/594
-
GULLASCH, D., BANGERTER, E., AND KRENN, S. 2010. Cache games - bringing access based cache attacks on aes to practice. Cryptology ePrint Archive, rep. 2010/594.
-
(2010)
Cryptology EPrint Archive
-
-
Gullasch, D.1
Bangerter, E.2
Krenn, S.3
-
29
-
-
28044445125
-
Timing aware information flow security for a javaCard-like bytecode
-
DOI 10.1016/j.entcs.2005.02.031, PII S1571066105051492
-
HEDIN, D. AND SANDS, D. 2005. Timing aware information flow security for a Javacard-like bytecode. Electron. Notes Theoret. Comput. Science 141, 1, 163-182. (Pubitemid 41689008)
-
(2005)
Electronic Notes in Theoretical Computer Science
, vol.141
, Issue.1 SPEC. ISS.
, pp. 163-182
-
-
Hedin, D.1
Sands, D.2
-
33
-
-
84943632039
-
Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems
-
Advances in Cryptology - CRYPTO '96
-
KOCHER, P. C. 1996. Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems. In Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology (CRYPTO'96). 104-113. (Pubitemid 126106234)
-
(1996)
Lecture Notes in Computer Science
, Issue.1109
, pp. 104-113
-
-
Kocher, P.C.1
-
37
-
-
36949003942
-
LLVM: A compilation framework for lifelong program analysis & transformation
-
Univ. of Illinois at Urbana-Champaign
-
LATTNER, C. AND ADVE, V. 2003. LLVM: A compilation framework for lifelong program analysis & transformation. Tech. rep., Univ. of Illinois at Urbana-Champaign.
-
(2003)
Tech. Rep.
-
-
Lattner, C.1
Adve, V.2
-
40
-
-
33745813464
-
The program counter security model: Automatic detection and removal of control-flow side channel attacks
-
DOI 10.1007/11734727-14, Information Security and Cryptology, ICISC 2005 - 8th International Conference, Revised Selected Papers
-
MOLNAR, D., PIOTROWSKI, M., SCHULTZ, D., AND WAGNER, D. 2005. The program counter security model: Automatic detection and removal of control-flow side channel attacks. In Proceedings of the International Conference Information Security and Cryptology (ICISC'05). 156-168. (Pubitemid 44029531)
-
(2006)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
, vol.3935 LNCS
, pp. 156-168
-
-
Molnar, D.1
Piotrowski, M.2
Schultz, D.3
Wagner, D.4
-
41
-
-
67650844203
-
Producing wrong data without doing anything obviously wrong!
-
MYTKOWICZ, T., DIWAN, A., HAUSWIRTH, M., AND SWEENEY, P. F. 2009. Producing wrong data without doing anything obviously wrong! In Proceeding of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'09). 265-276.
-
(2009)
Proceeding of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'09)
, pp. 265-276
-
-
Mytkowicz, T.1
Diwan, A.2
Hauswirth, M.3
Sweeney, P.F.4
-
43
-
-
33745640963
-
Cache attacks and counter-measures: The case of AES
-
DOI 10.1007/11605805-1, Topics in Cryptology - CT-RSA 2006: The Cryptographers' Track at the RSA Conference 2006, Proceedings
-
OSVIK, D. A., SHAMIR, A., AND TROMER, E. 2006. Cache attacks and countermeasures: The case of AES. In Topics in Cryptology, The Cryptographers Track at the RSA Conference (CT-RSA'06). 1-20. (Pubitemid 43971699)
-
(2006)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
, vol.3960
, pp. 1-20
-
-
Osvik, D.A.1
Shamir, A.2
Tromer, E.3
-
44
-
-
74049152260
-
Hey, you, get off of my cloud: Exploring information leakage in third-party compute clouds
-
RISTENPART, T., TROMER, E., SHACHAM, H., AND SAVAGE, S. 2009. Hey, you, get off of my cloud: Exploring information leakage in third-party compute clouds. In Proceedings of the 16th ACM Conference on Computer and Communications Security (CCS'09). 199-212.
-
(2009)
Proceedings of the 16th ACM Conference on Computer and Communications Security (CCS'09)
, pp. 199-212
-
-
Ristenpart, T.1
Tromer, E.2
Shacham, H.3
Savage, S.4
-
47
-
-
34547331261
-
Covert and side channels due to processor architecture
-
DOI 10.1109/ACSAC.2006.20, 4041191, Proceedings - Annual Computer Security Applications Conference, ACSAC
-
WANG, Z. AND LEE, R. B. 2006. Covert and side channels due to processor architecture. In Proceedings of the 22nd Annual Computer Security Applications Conference (ACSAC'06). 473-482. (Pubitemid 351232939)
-
(2006)
Proceedings - Annual Computer Security Applications Conference, ACSAC
, pp. 473-482
-
-
Wang, Z.1
Lee, R.B.2
-
48
-
-
35348816106
-
New cache designs for thwarting software cache-based side channel attacks
-
DOI 10.1145/1250662.1250723, ISCA'07: 34th Annual International Symposium on Computer Architecture, Conference Proceedings
-
WANG, Z. AND LEE, R. B. 2007. New cache designs for thwarting software cache-based side channel attacks. SIGARCH Comput. Architec. News 35, 2, 494-505. (Pubitemid 47582127)
-
(2007)
Proceedings - International Symposium on Computer Architecture
, pp. 494-505
-
-
Wang, Z.1
Lee, R.B.2
|