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Volumn , Issue , 2011, Pages

Embedded flash technologies and their applications: Status & outlook

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION AREA; AUTOMOTIVE MICROCONTROLLERS; EMBEDDED FLASH TECHNOLOGY; LEADING EDGE; MARKET SEGMENT; MARKET VOLUME;

EID: 84857002753     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2011.6131521     Document Type: Conference Paper
Times cited : (32)

References (16)
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    • Proc. IMW (2010)
    • Piazza, F.1
  • 3
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    • A 130nm high-density embedded EEPROM as Universal Memory for code and data storage based on a 1T FN/FN Flash cell
    • Christian Peters, Holger Sedlak, Gerd Dirscherl, Michael Bollu, Andreas Schlaffer and Stefanie Thierold, "A 130nm high-density embedded EEPROM as Universal Memory for code and data storage based on a 1T FN/FN Flash cell", Proc. NVSMW (2004), pp. 55,56
    • Proc. NVSMW (2004)
    • Peters, C.1    Sedlak, H.2    Dirscherl, G.3    Bollu, M.4    Schlaffer, A.5    Thierold, S.6
  • 4
    • 0004942031 scopus 로고    scopus 로고
    • Abnormal Charge Loss of Flash Cells at Medium Temperatures
    • G. Tempel et al., "Abnormal Charge Loss of Flash Cells at Medium Temperatures", Proc. NVSMW (2000)
    • Proc. NVSMW (2000)
    • Tempel, G.1
  • 5
    • 28744434483 scopus 로고    scopus 로고
    • Bake Enhanced Erratic Behaviour in Gate Stress Characteristics in Flash Memories
    • Guoqiao Tao, Andrea Scarpa, Leo van Marwijk, and Do Dormans, "Bake Enhanced Erratic Behaviour in Gate Stress Characteristics in Flash Memories", Proc. IRPS (2005)
    • Proc. IRPS (2005)
    • Tao, G.1    Scarpa, A.2    Van Marwijk, L.3    Dormans, D.4
  • 8
    • 4544291580 scopus 로고    scopus 로고
    • A Novel MNOS Technology Using Gate Hole Injection in Erase Operation for Embedded Non-Volatile Memory Applications
    • F. Ito et al., "A Novel MNOS Technology Using Gate Hole Injection in Erase Operation for Embedded Non-Volatile Memory Applications", Symposium on VLSI Technology (2004), pp. 80-81
    • Symposium on VLSI Technology (2004) , pp. 80-81
    • Ito, F.1
  • 9
    • 84857015164 scopus 로고    scopus 로고
    • High-density low-voltage byte-erasable EEPROM memory based on a 2T-FNFN Flash cell
    • Do Dormans, Jochen Garbe, Dick Boter, Han Dijkstra and Rob Verhaar,"High-density low-voltage byte-erasable EEPROM memory based on a 2T-FNFN Flash cell", Proc. NVSMW 2003
    • Proc. NVSMW 2003
    • Do Dormans, J.G.1    Boter, D.2    Dijkstra, H.3    Verhaar, R.4
  • 10
    • 50249176020 scopus 로고    scopus 로고
    • 2T-FN eNVM with 90 nm Logic process for Smart Card
    • Y.K. Lee et al., "2T-FN eNVM with 90 nm Logic process for Smart Card, Proc. NVSMW/ICMTD 2008
    • Proc. NVSMW/ICMTD 2008
    • Lee, Y.K.1
  • 11
    • 84871828157 scopus 로고    scopus 로고
    • Highly Optimized NC-based Split Gate Flash for High Performance and Low Power Microcontroller Applications
    • J. Yater et al., "Highly Optimized NC-based Split Gate Flash for High Performance and Low Power Microcontroller Applications", Proc. IMW (2011)
    • Proc. IMW (2011)
    • Yater, J.1
  • 12
    • 84857004473 scopus 로고    scopus 로고
    • Embedded Flash on 90nm Logic Technology &Beyond for FPGAs
    • H. Kojima et al., "Embedded Flash on 90nm Logic Technology &Beyond for FPGAs", Proc. IEDM (2007)
    • Proc. IEDM (2007)
    • Kojima, H.1
  • 13
    • 61549133817 scopus 로고    scopus 로고
    • SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era
    • Maurelli, A., Belot, D., Campardo, G., "SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era", Proc. Of the IEEE, Vol.97, pp 9-17
    • Proc. Of the IEEE , vol.97 , pp. 9-17
    • Maurelli, A.1    Belot, D.2    Campardo, G.3
  • 14
    • 77952370692 scopus 로고    scopus 로고
    • A 45nm Generation Phase Change Memory Technology
    • G. Servalli, "A 45nm Generation Phase Change Memory Technology", Proc. IEDM (2009) pp. 113-116
    • Proc. IEDM (2009) , pp. 113-116
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  • 15
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    • Latest Advances and Roadmap for In-plane and Perpendicular STT-MRAM
    • A. Driskill-Smith at al., "Latest Advances and Roadmap for In-plane and Perpendicular STT-MRAM", Proc. IMW (2011)
    • Proc. IMW (2011)
    • Driskill-Smith, A.1
  • 16
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    • A High Performance and Low Power Logic CMOS Compatible Embedded 1Mb CBRAM Non-Volatile Macro
    • Shane Hollmer, Nad Gilbert, John Dinh, Derric Lewis and Narbeh Derhacobian, "A High Performance and Low Power Logic CMOS Compatible Embedded 1Mb CBRAM Non-Volatile Macro", Proc. IMW (2011)
    • Proc. IMW (2011)
    • Hollmer, S.1    Gilbert, N.2    Dinh, J.3    Lewis, D.4    Derhacobian, N.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.