Reconfigurable N-level memristor memory design

Proceedings of the International Joint Conference on Neural Networks

Volumn , Issue , 2011, Pages 3042-3048

  Merkel, Cory E ^a   Nagpal, Nakul ^a   Mandalapu, Sindhura ^a   Kudithipudi, Dhireesha ^a  

^a Rochester Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH DENSITY; ION MOBILITY; LOW POWER; MEMORY DESIGN; MEMRISTOR; NON-VOLATILE MEMORIES; PROCESS VARIATION; PROPOSED ARCHITECTURES; RE-CONFIGURABLE; RESISTANCE STATE; RESISTIVE RANDOM ACCESS MEMORY;

MEMORY ARCHITECTURE; MEMRISTORS; NETWORK ARCHITECTURE; NEURAL NETWORKS; PASSIVE FILTERS; RESISTORS;

RANDOM ACCESS STORAGE;

EID: 80054770037     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2011.6033622     Document Type: Conference Paper

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