Rigorous system level modeling and analysis of mixed HW/SW systems

9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011

Volumn , Issue , 2011, Pages 11-20

  Bourgos, P ^a   Basu, A ^a   Bozga, M ^a   Bensalem, S ^a   Sifakis, J ^a   Huang, K ^b  

^a VERIMAG   (France)

^b ZHEJIANG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SOFTWARES; DISTRIBUTED OPERATIONS; DISTRIBUTED PLATFORMS; GRAND CHALLENGE; HARDWARE ARCHITECTURE; HARDWARE/SOFTWARE; MODELING AND ANALYSIS; MULTI CORE; MULTICORE ARCHITECTURES; SYSTEM MODELS; SYSTEM-LEVEL MODELING;

COMPUTER SIMULATION; EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; FORMAL METHODS; SOFTWARE ARCHITECTURE; SYSTEMS ANALYSIS;

MATHEMATICAL MODELS;

EID: 80052111007     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MEMCOD.2011.5970506     Document Type: Conference Paper

References (23)

1. L. Thiele, I. Bacivarov, W. Haid, and K. Huang, "Mapping applications to tiled multiprocessor embedded systems," in ACSD. IEEE Computer Society, 2007, pp. 29-40.
2. A. Basu, M. Bozga, and J. Sifakis, "Modeling Heterogeneous Real-time Components in BIP," in SEFM, 2006, pp. 3-12.
3. K. Asanovic et al., "The landscape of parallel computing research: A view from berkeley," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2006-183, Dec 2006.
4. B. Bonakdarpour, M. Bozga, M. Jaber, J. Quilbeuf, and J. Sifakis, "From high-level component-based models to distributed implementations, " in EMSOFT, 2010.
5. D. Abhijit et al., "A next-generation design framework for platform-based design," in DVCon 2007, February 2007.
6. B. Twan et al., "Model-driven design-space exploration for embedded systems: The octopus toolset," in ISoLA (1), 2010, pp. 90-105.
7. T. Grtker, S. Liao, G. Martin, and S. Swan, System Design with SystemC. Kluwer Academic Publishers, 2002.
8. C. Haubelt, T. Schlichter, J. Keinert, and M. Meredith, "Systemcodesigner: automatic design space exploration and rapid prototyping from behavioral models," in DAC, 2008, pp. 580-585.
9. P. Lieverse, T. Stefanov, P. van der Wolf, and E. Deprettere, "System level design with SPADE: an M-JPEG case study," ICCAD, pp. 31-38, 2001. (Pubitemid 33148934)
10. C. Erbas, A. D. Pimentel, M. Thompson, and S. Polstra, "A framework for system-level modeling and simulation of embedded systems architectures," EURASIP J. Embedded Syst., vol. 2007, pp. 2-2, 2007.
11. M. Moy, F. Maraninchi, and L. Maillet-Contoz, "Lussy: A toolbox for the analysis of systems-on-a-chip at the transactional level," in ACSD, 2005, pp. 26-35. (Pubitemid 44088254)
12. B. Kienhuis, E. F. Deprettere, K. A. Vissers, and P. van der Wolf, "An approach for quantitative analysis of applicationspecific dataflow architectures," in ASAP, 1997, pp. 338-349.
13. I. Moussa, T. Grellier, and G. Nguyen, "Exploring sw performance using soc transaction-level modeling," in DATE, 2003, pp. 20 120-20 125.
14. L. Thiele, S. Chakraborty, and M. Naedele, "Real-time calculus for scheduling hard real-time systems," in ISCAS, vol. 4, no. March. IEEE, 2002, pp. 101-104.
15. R. Henia et al., "System-level performance analysis - the SymTA/S approach," in IEE Proceedings Computers and Digital Techniques, vol. 152, no. 2, 2005, pp. 148-166. (Pubitemid 40718622)
16. R. B. Salah, M. Bozga, and O. Maler, "Compositional timing analysis," in EMSOFT, 2009, pp. 39-48.
17. Y. Abdeddaim, E. Asarin, and O. Maler, "Scheduling with timed automata," Theoretical Computer Science, vol. 354, pp. 272-300, 2006. (Pubitemid 43333211)
18. S. Künzli, F. Poletti, L. Benini, and L. Thiele, "Combining simulation and formal methods for system-level performance analysis," in DATE, 2006, pp. 236-241.
19. G. Kahn, "The semantics of a simple language for parallel programming," in Information processing, J. L. Rosenfeld, Ed. Stockholm, Sweden: North Holland, Amsterdam, Aug 1974, pp. 471-475.
20. S. Bliudze and J. Sifakis, "A Notion of Glue Expressiveness for Component-Based Systems," in CONCUR, ser. LNCS, vol. 5201, 2008, pp. 508-522.
21. A. Basu, S. Bensalem, M. Bozga, J. Combaz, M. Jaber, T.-H. Nguyen, and J. Sifakis, "Rigorous component-based design using the BIP framework," IEEE Software, Special Edition -Software Components beyond Programming - from Routines to Services, June 2011, to appear.
22. K. Huang, "Coupling MPARM with DOL," ETH Zurich, Technical Report, Nov 2009.
23. A. Basu, S. Bensalem, M. Bozga, B. Caillaud, B. Delahaye, and A. Legay, "Statistical abstraction and model-checking of large heterogeneous systems," in FMOODS/FORTE, 2010, pp. 32-46.