A new wafer-level packaging technology for MEMS with hermetic micro-environment

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2011, Pages 1604-1609

  Chanchani, Rajen ^a   Nordquist, Christopher D ^a   Olsson, Roy H ^a   Peterson, Tracy ^a   Shul, Randy ^a   Ahlers, Catalina ^a   Plut, Thomas A ^a   Patrizi, Gary A ^a  

^a SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALN; ALN LAYERS; BONDED WAFERS; CRACK-FREE SURFACES; EUTECTIC BONDING; EUTECTIC TEMPERATURE; HIGH YIELD; IN-VACUUM; INITIAL COSTS; LOW COSTS; MECHANICAL LAPPING; METAL STACKS; NITROGEN ENVIRONMENT; PRESSURE MONITORING; PROCESS STEPS; RF PERFORMANCE; SILICON-BASED; SURFACE MOUNTING; WAFER LEVEL; WAFER LEVEL PACKAGING; WAFER-LEVEL PACKAGING TECHNOLOGY; WIREBOND; WIREBONDING;

COST ACCOUNTING; COST BENEFIT ANALYSIS; EUTECTICS; GERMANIUM; PACKAGING; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; STRUCTURES (BUILT OBJECTS); TECHNOLOGY; WAFER BONDING; WIRE;

ELECTRONICS PACKAGING;

EID: 79960435131     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2011.5898725     Document Type: Conference Paper

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