Ultra-low power nanomagnet-based computing: A system-level perspective

IEEE Transactions on Nanotechnology

Volumn 10, Issue 4, 2011, Pages 778-788

  Augustine, Charles ^a   Fong, Xuanyao ^a   Behin Aein, Behtash ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Low power; nanomagnet; spintronics; systolic array architectures

Indexed keywords

CLOCK ARCHITECTURE; COMPUTING PARADIGM; DESIGN APPROACHES; DIGITAL ELECTRONICS; ENERGY-DELAY; LOW POWER; MOSFET SCALING; NANOMAGNETS; NARROW GAP; PARAMETER VARIATION; POWER DENSITIES; SIMULATION FRAMEWORK; STEEL CORE; SUBTHRESHOLD; SWITCHING DEVICES; SWITCHING ENERGY; SYSTEM ARCHITECTURES; SYSTEM LEVELS; SYSTOLIC ARRAY ARCHITECTURES; THERMAL LIMITS; ULTRA-LOW POWER;

ARCHITECTURE; DESIGN; DISCRETE COSINE TRANSFORMS; SCALABILITY;

NANOMAGNETICS;

EID: 79960221355     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2010.2079941     Document Type: Article

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