Low temperature solid state gold bonding of Si chips to alumina substrates

Journal of Electronic Packaging

Volumn 133, Issue 2, 2011, Pages

  Sha, Chu Hsuan ^a   Lee, Chin C ^a  

^a University of California at Irvine   (United States)

Author keywords

alumina substrate; electroplating; gold; microstructure; silicon chip; solid state bonding

Indexed keywords

ALUMINUM OXIDE; BINARY ALLOYS; CHIP SCALE PACKAGES; GOLD ALLOYS; LEAD-FREE SOLDERS; SCANNING ELECTRON MICROSCOPY; SILICON; SILVER ALLOYS; SUBSTRATES; TEMPERATURE; THERMAL EXPANSION; TIN ALLOYS;

ALUMINA SUBSTRATES; AU LAYERS; BONDING MEDIUM; BONDING PROCESS; GOLD; LOWS-TEMPERATURES; MOLTEN PHASIS; SILICON CHIP; SOLID STATE BONDING; STATIC PRESSURE;

ALUMINA;

EID: 79959728260     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.4003868     Document Type: Article

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