|
Volumn 15, Issue 6, 2011, Pages 665-667
|
EIRA LDPC codes on FPGA
|
Author keywords
eIRA codes; error correction codes; error rate floor; FPGA; LDPC codes
|
Indexed keywords
ALTERNATIVE APPROACH;
DOUBLE PRECISION;
EIRA CODES;
ERROR CORRECTION CODES;
ERROR RATE;
ERROR-RATE FLOOR;
LDPC CODES;
LOW-DENSITY PARITY-CHECK CODES;
MATRIX;
CODES (SYMBOLS);
CODING ERRORS;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
FLOORS;
ERROR CORRECTION;
|
EID: 79959572651
PISSN: 10897798
EISSN: None
Source Type: Journal
DOI: 10.1109/LCOMM.2011.040711.110336 Document Type: Article |
Times cited : (7)
|
References (9)
|