An average-performance-oriented subthreshold processor self-timed by memory read completion

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 58, Issue 5, 2011, Pages 299-303

  Fuketa, Hiroshi ^a   Kuroda, Dan ^b   Hashimoto, Masanori ^a,c   Onoye, Takao ^a,c  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

^b OSAKA UNIVERSITY   (Japan)

^c JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

Low power VLSI; self timed processor; subthreshold circuit

Indexed keywords

LOW POWER ELECTRONICS; METALS; MOS DEVICES; OXIDE SEMICONDUCTORS;

COMPLIMENTARY METAL OXIDE SEMICONDUCTORS; LOW POWER VLSIS; PERFORMANCE-ORIENTED; REDUCED INSTRUCTION SET COMPUTERS; SELF-TIMED; STATIC RANDOM ACCESS MEMORY; SUB-THRESHOLD CIRCUITS; SYNCHRONOUS OPERATIONS;

STATIC RANDOM ACCESS STORAGE;

EID: 79958768806     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2011.2149110     Document Type: Article

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