Integration and packaging of a macrochip with silicon nanophotonic links

IEEE Journal on Selected Topics in Quantum Electronics

Volumn 17, Issue 3, 2011, Pages 546-558

  Cunningham, John E ^a   Krishnamoorthy, Ashok V ^a   Ho, Ron ^a   Shubin, Ivan ^a   Thacker, Hiren ^a   Lexau, Jon ^a   Lee, Daniel C ^b   Feng, Dazeng ^b   Chow, Eugene ^c   Luo, Ying ^a   Zheng, Xuezhe ^a   Li, Guoliang ^a   Yao, Jin ^a   Pinguet, Thierry ^d   Raj, Kannan ^a   Asghari, Mehdi ^b   Mitchell, James G ^a  

^a ORACLE CORPORATION   (United States)

^b KOTURA INC   (United States)

^c PALO ALTO RESEARCH CENTER   (United States)

^d CISCO SYSTEMS   (United States)

Author keywords

CMOS; computing; macrochip; nanophotonics; optical interconnects; routers; silicon photonics; switching; very large scale integration (VLSI)

Indexed keywords

CMOS; COMPUTING; MACROCHIP; SILICON PHOTONICS; VERY LARGE SCALE INTEGRATION (VLSI);

NANOPHOTONICS; OPTICAL INTERCONNECTS; PACKAGING; PHOTONIC DEVICES;

INTEGRATION;

EID: 79958268832     PISSN: 1077260X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSTQE.2010.2091674     Document Type: Article

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