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Volumn , Issue , 2010, Pages
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Timing analysis and optimization for 3D stacked multi-core microprocessors
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Author keywords
[No Author keywords available]
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Indexed keywords
CORE LEVELS;
DESIGN METHODOLOGY;
MULTI CORE;
OVERALL DESIGN;
PHYSICAL LAYOUT;
TIMING ANALYSIS;
TIMING CONSTRAINTS;
TIMING OPTIMIZATION;
BUDGET CONTROL;
MICROPROCESSOR CHIPS;
OPTIMIZATION;
TIMING CIRCUITS;
THREE DIMENSIONAL;
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EID: 79955946162
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/3DIC.2010.5751444 Document Type: Conference Paper |
Times cited : (18)
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References (8)
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