메뉴 건너뛰기




Volumn 21, Issue 5, 2011, Pages 660-673

A two-stage rate control mechanism for RDO-based H.264/AVC encoders

Author keywords

H.264 AVC; rate control; rate distortion optimization

Indexed keywords

COST CALCULATOR; DATA DEPENDENCIES; H.264/AVC; H.264/AVC ENCODER; HARDWARE ENCODERS; HIGH RATE; INTER PREDICTION; INTRA PREDICTION; LOW COMPLEXITY; MACRO BLOCK; MEAN ABSOLUTE DIFFERENCES; MOTION INFORMATION; PREDICTION ALGORITHMS; PROPOSED ARCHITECTURES; RATE CONTROL ALGORITHMS; RATE CONTROLS; RATE DISTORTION PERFORMANCE; RATE DISTORTIONS; RATE-CONTROL MECHANISM; RATE-DISTORTION OPTIMIZATION; TWO STAGE;

EID: 79955573532     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2011.2129770     Document Type: Article
Times cited : (9)

References (28)
  • 6
    • 54949119938 scopus 로고    scopus 로고
    • Fast inter mode decision using spatial property of motion field
    • Oct
    • L. Shen, Z. Liu, Z. Zhang, and X. Shi, "Fast inter mode decision using spatial property of motion field," IEEE Trans. Multimedia, vol. 10, no. 6, pp. 1208-1214, Oct. 2008.
    • (2008) IEEE Trans. Multimedia , vol.10 , Issue.6 , pp. 1208-1214
    • Shen, L.1    Liu, Z.2    Zhang, Z.3    Shi, X.4
  • 7
    • 71849118758 scopus 로고    scopus 로고
    • A dynamic quality-adjustable H.264 video encoder for power-aware video applications
    • Dec
    • H. C. Chang, J. W. Chen, B. T. Wu, C. L. Su, J. S. Wang, and J. I. Guo, "A dynamic quality-adjustable H.264 video encoder for power-aware video applications," IEEE Trans. Circuits Syst. Video Technol., vol. 19, no. 12, pp. 1739-1754, Dec. 2009.
    • (2009) IEEE Trans. Circuits Syst. Video Technol. , vol.19 , Issue.12 , pp. 1739-1754
    • Chang, H.C.1    Chen, J.W.2    Wu, B.T.3    Su, C.L.4    Wang, J.S.5    Guo, J.I.6
  • 12
    • 0003622129 scopus 로고
    • ISO-IEC/JTC1/SC29/WG11/N0400, Apr
    • Test Model 5, ISO-IEC/JTC1/SC29/WG11/N0400, Apr. 1993.
    • (1993) Test Model 5
  • 13
    • 5444231753 scopus 로고    scopus 로고
    • ISO/IEC 14496-2 MPEG4 Video VM-Version 8.0, ISO/IEC JTC1/SC29/WG11, Video Group, Stockholm, Sweden
    • Coding of Moving Pictures and Associated Audio MPEG 97/W1796, ISO/IEC 14496-2 MPEG4 Video VM-Version 8.0, ISO/IEC JTC1/SC29/WG11, Video Group, Stockholm, Sweden, 1997.
    • (1997) Coding of Moving Pictures and Associated Audio MPEG 97/W1796
  • 17
    • 76649129599 scopus 로고    scopus 로고
    • Hardware/software co-design of low cost rate control scheme for H.264/AVC
    • Feb.
    • C. H. Kuo, L. C. Chang, K. W. Fan, and B. D. Liu, "Hardware/software co-design of low cost rate control scheme for H.264/AVC," IEEE Trans. Circuits Syst. Video Technol., vol. 20, no. 2, pp. 250-261, Feb. 2010.
    • (2010) IEEE Trans. Circuits Syst. Video Technol. , vol.20 , Issue.2 , pp. 250-261
    • Kuo, C.H.1    Chang, L.C.2    Fan, K.W.3    Liu, B.D.4
  • 18
    • 77955987537 scopus 로고    scopus 로고
    • Low complexity MAD prediction algorithms for rate controllable H.264/AVC hardware encoders
    • May
    • L. C. Chang, C. H. Kuo, and B. D. Liu, "Low complexity MAD prediction algorithms for rate controllable H.264/AVC hardware encoders," in Proc. IEEE Int. Symp. Circuits Syst., May 2010, pp. 661-664.
    • (2010) Proc. IEEE Int. Symp. Circuits Syst. , pp. 661-664
    • Chang, L.C.1    Kuo, C.H.2    Liu, B.D.3
  • 19
    • 0029775009 scopus 로고
    • Mathematical analysis of MPEG compression capability and its application to rate control
    • Oct
    • J. Katto and M. Ohta, "Mathematical analysis of MPEG compression capability and its application to rate control," in Proc. IEEE Int. Conf. Image Process., vol. 2. Oct. 1995, pp. 555-558.
    • (1995) Proc. IEEE Int. Conf. Image Process. , vol.2 , pp. 555-558
    • Katto, J.1    Ohta, M.2
  • 21
    • 0035422133 scopus 로고    scopus 로고
    • Low-delay rate control for DCT video coding via ρ-domain source modeling
    • DOI 10.1109/76.937431, PII S1051821501065302
    • Z. He, Y. Kim, and S. Mitra, "Low-delay rate control for DCT video coding via ρ-domain source modeling," IEEE Trans. Circuits Syst. Video Technol., vol. 11, no. 8, pp. 928-940, Aug. 2001. (Pubitemid 32780002)
    • (2001) IEEE Transactions on Circuits and Systems for Video Technology , vol.11 , Issue.8 , pp. 928-940
    • He, Z.1    Kim, Y.K.2    Mitra, S.K.3
  • 22
    • 68149159746 scopus 로고    scopus 로고
    • Quantization parameter refinement in H.264 through ρ-domain rate model
    • Jun
    • Y. Dong, X. Fang, and J. Yang, "Quantization parameter refinement in H.264 through ρ-domain rate model," IEICE Trans. Inform. Syst., vol. E91-D, no. 6, pp. 1834-1937, Jun. 2008.
    • (2008) IEICE Trans. Inform. Syst. , vol.E91-D , Issue.6 , pp. 1834-1937
    • Dong, Y.1    Fang, X.2    Yang, J.3
  • 23
    • 34247598510 scopus 로고    scopus 로고
    • Rate-distortion modeling for effective H.264/AVC encoding
    • May
    • Y. K. Tu, J. F. Yang, and M. T. Sun, "Rate-distortion modeling for effective H.264/AVC encoding," IEEE Trans. Circuits Syst. Video Technol., vol. 17, no. 5, pp. 530-543, May 2007.
    • (2007) IEEE Trans. Circuits Syst. Video Technol. , vol.17 , Issue.5 , pp. 530-543
    • Tu, Y.K.1    Yang, J.F.2    Sun, M.T.3
  • 24
    • 70349443295 scopus 로고    scopus 로고
    • Full RDO-support power-aware CABAC encoder with efficient content access
    • Sep
    • X. Tian, T. M. Le, X. Jiang, and Y. Lian, "Full RDO-support power-aware CABAC encoder with efficient content access," IEEE Trans. Circuits Syst. Video Technol., vol. 19, no. 9, pp. 1262-1273, Sep. 2009.
    • (2009) IEEE Trans. Circuits Syst. Video Technol. , vol.19 , Issue.9 , pp. 1262-1273
    • Tian, X.1    Le, T.M.2    Jiang, X.3    Lian, Y.4
  • 25
    • 45249100938 scopus 로고    scopus 로고
    • VLSI architecture of H.264 block size decision based on rate-distortion optimization
    • Dec
    • R. Hashimoto, K. Kato, G. Fujita, and T. Onoye, "VLSI architecture of H.264 block size decision based on rate-distortion optimization," in Proc. Int. Symp. Intell. Process. Commun., Dec. 2006, pp. 618-621.
    • (2006) Proc. Int. Symp. Intell. Process. Commun , pp. 618-621
    • Hashimoto, R.1    Kato, K.2    Fujita, G.3    Onoye, T.4
  • 27
    • 51749100399 scopus 로고    scopus 로고
    • An efficient VLSI architecture for rate distortion optimization in AVS video encoder
    • May
    • H. B. Yin, X. Z. Lou, Z. L. Xia, and W. Gao, "An efficient VLSI architecture for rate distortion optimization in AVS video encoder," in Proc. IEEE Int. Symp. Circuits Syst., May 2008. pp. 2805-2808.
    • (2008) Proc. IEEE Int. Symp. Circuits Syst. , pp. 2805-2808
    • Yin, H.B.1    Lou, X.Z.2    Xia, Z.L.3    Gao, W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.