Bulk planar junctionless transistor (BPJLT): An attractive device alternative for scaling

IEEE Electron Device Letters

Volumn 32, Issue 3, 2011, Pages 261-263

  Gundapaneni, Suresh ^a   Ganguly, Swaroop ^a   Kottantharayil, Anil ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

Author keywords

Gated resistor; junctionless transistor (JLT); scaling

Indexed keywords

DEVICE LAYERS; DEVICE SIMULATIONS; DOPED DEVICES; FLAT BAND; FREE FIELDS; FULLY DEPLETED; GATED RESISTOR; JUNCTIONLESS TRANSISTOR (JLT); OFF-STATE LEAKAGE CURRENT; ON STATE CURRENT; ORDERS OF MAGNITUDE; PHYSICAL DEVICES; PLANAR JUNCTIONS; SCALING; SHORT-CHANNEL EFFECT; SOURCE-DRAIN; ULTRA-THIN;

DOPING (ADDITIVES); FIELD EFFECT TRANSISTORS;

RESISTORS;

EID: 79951960224     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2010.2099204     Document Type: Article

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