Non-destructive testing of a high dense small dimension through silicon via (TSV) array structures by using 3D X-ray computed tomography method (CT scan)

2010 12th Electronics Packaging Technology Conference, EPTC 2010

Volumn , Issue , 2010, Pages 462-466

  Sekhar, V N ^a   Neo, Sam ^b   Yu, Li Hong ^a   Trigg, Alastair David ^a   Kuo, Cheng Cheng ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b Alex Corporation(S) Pte Ltd   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAY STRUCTURES; CT SCAN; DEFECT SHAPES; HIGH DENSITY; NON DESTRUCTIVE TESTING; PROCESS DEVELOPMENT; PROCESSING STEPS; SPACE BETWEEN; THROUGH-SILICON-VIA; X-RAY COMPUTED TOMOGRAPHY; X-RAY CT;

ELECTRONICS PACKAGING; FAILURE ANALYSIS; NONDESTRUCTIVE EXAMINATION; QUALITY ASSURANCE; SILICON WAFERS; THREE DIMENSIONAL; X RAY ANALYSIS; X RAYS;

COMPUTERIZED TOMOGRAPHY;

EID: 79951878977     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2010.5702683     Document Type: Conference Paper

References (11)

1. K. Sakuma et al., "3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections" IBM J. RES & DEV. VOL. 52 No.6, NOV-2008
2. Nir Magen et al, Proc. Of the 2004 international workshop on System level interconnect prediction, France, pp 7-13, 2004.
3. M. Koyanagi et al, " Future system-on-Silicon LSI chips" IEEE Micro 18, No.4, 17-22 (1998)
4. A. klumpp et al, "Chip-to-Wafer Stacking Technology for 3D System Integration" ECTC-2003, pp 1080-1083
5. J. U. Knickerbocker et al, "System-on-Package (SOP) Technology, Characterization and Application" ECTC-2006, pp 415-421
6. th Annual Conference on Design Automation, San Diego, CA,2007, pp. 562-567
7. Shekhar Borkar, "3D Integration for Energy Efficient System Design" Symposium on VLSI Technology Digest of Technical Papers 2009, pp. 58-59
8. Akira Hirakimoto et al, "Progress of Microfocus X-ray Systems for Fluoroscopic and Computed Tomography" Spectrochimica Acta Part B: Atomic Spectroscopy, Vol 59, Issue8, Aug-2004 pp 1101-1106
9. George A Riley "Advanced packaging Magazine" Oct-2008, pp. 16-18
10. H. Y. Li et al., "Fast Electroplating TSV Process Development for the Via-Last Approach" ECTC-2010, pp. 777-780
11. Henry Proudhon "Using X-ray micro-tomography to probe microstructure and damage of structural materials" WEMESURF contact course, Paris , 2010