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Volumn , Issue , 2010, Pages 388-391

Hierarchical routing architectures in clustered 2D-mesh networks-on-chip

Author keywords

2D mesh; Cluster; Hierarchical routing; Network on Chip

Indexed keywords

2D-MESH; BANDWIDTH DEGRADATION; CLUSTER; CYCLE-ACCURATE SIMULATION; HIERARCHICAL ROUTING; HIERARCHICAL ROUTINGS; MESH NETWORK; MULTIPROCESSOR-SYSTEM; NETWORK ON CHIP; NETWORKS ON CHIPS; SUITABLE SOLUTIONS;

EID: 79851471036     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2010.5682890     Document Type: Conference Paper
Times cited : (35)

References (10)
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  • 3
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  • 4
    • 0005467492 scopus 로고    scopus 로고
    • Route Packets, Not Wires: On-Chip Interconnection Networks
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    • W. Dally and B. Towles. Route Packets, Not Wires: On-Chip Interconnection Networks. In Proc. of DAC, pages 84-89, June 2001.
    • (2001) Proc. of DAC , pp. 84-89
    • Dally, W.1    Towles, B.2
  • 7
    • 27344456043 scopus 로고    scopus 로고
    • AEthereal Network on Chip: Concepts, Architectures and Implementations
    • September-October
    • K. Goossens, J. Dielissen, and A. Radulescu. AEthereal Network on Chip: Concepts, Architectures and Implementations. IEEE Design and Test of Computers, 22(5):21-31, September-October 2005.
    • (2005) IEEE Design and Test of Computers , vol.22 , Issue.5 , pp. 21-31
    • Goossens, K.1    Dielissen, J.2    Radulescu, A.3
  • 8
    • 16244392403 scopus 로고    scopus 로고
    • Silent: Serialized low energy transmission coding for on-chip interconnection networks
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    • L. Kangmin, S. Lee, and H. Yoo. Silent: serialized low energy transmission coding for on-chip interconnection networks. In Proc. of Int. Conf. on Computer Aided Design (ICCAD), pages 448-451, January 2005.
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    • Kangmin, L.1    Lee, S.2    Yoo, H.3
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    • 3042740415 scopus 로고    scopus 로고
    • Guaranteed Bandwidth using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip
    • February
    • M. Millberg and et al. Guaranteed Bandwidth using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip. In Proc. of DATE, pages 890-895, February 2004.
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  • 10
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    • Giganoc - A hierarchical network-on-chip for scalable chip-multiprocessors
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    • C. Puttmann, J. Niemann, M. Porrmann, and U. Ruckert. Giganoc - a hierarchical network-on-chip for scalable chip-multiprocessors. In Proc. of Euromicro Conf. on DSD, pages 495-502, August 2007.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.