Phase-Change-Memory-based storage elements for configurable logic

Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10

Volumn , Issue , 2010, Pages 17-20

  Gaillardon, Pierre Emmanuel ^a   Ben Jamaa, M Haykel ^a   Reyboz, Marina ^a   Beneventi, Giovanni Betti ^a   Clermidy, Fabien ^a   Perniola, Luca ^a   O'Connor, Ian ^b  

^a CEA GRENOBLE   (France)

^b UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BACK END OF LINES; COMPLEX CIRCUITS; CONFIGURABLE LOGIC; CONFIGURATION MEMORY; DELAY REDUCTION; ELEMENTARY CIRCUITS; MEMORY NODES; NON-VOLATILE; ON-RESISTANCE; PHASE CHANGES; RECONFIGURABLE LOGIC; STORAGE ELEMENTS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PHASE CHANGE MEMORY; RECONFIGURABLE HARDWARE;

MEMORY ARCHITECTURE;

EID: 79551541986     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2010.5681535     Document Type: Conference Paper

References (16)

1. S. Lai, "Compact status of the phase change memory and its future", IEDM Tech. Dig., 225-228 (2003).
2. S. Raoux et al., "Phase-change random access memory: A scalable technology", IBM. J. Res. & Dev., 52(4/5) 465-479 (2008).
3. G. Bruns et al., "Nanosecond switching in GeTe phase change memory cells", Appl. Phys. Lett., 95, 043108 (2009).
4. G. Servalli et al., "A 45nm Generation Phase Change Memory Technology", Proc. IEDM Tech Dig, pp. 113-116, 2009.
5. J.H. Oh et al., "Full Integration of Highly Manufacturable 512Mb PRAM based on 90nm Technology", IEDM Tech.Dig., p.49-52, 2006.
6. V. Betz et al., "Architecture and CAD for Deep-Submicron FPGAs" Kluwer Academic Publishers, New York, 1999.
7. J.H. Kyung et al., "A novel flash-based FPGA technology with deep trench isolation", IEEE Non-Volatile Semiconductor Memory Workshop, 2007.
8. L. Torres et al.; "A dynamic reconfigurable MRAM based FPGA", ERSA conference, 2010.
9. A.L. Lacaita et al., "Phase-change memories", phys.stat.sol. (a) 205, No.10, 2281-2297(2008).
10. M. Reyboz et al., "Compact Modeling of a PCRAM cell", MOS AK workshop, April 2010, Italy.
11. A. Pirovano at al., "Low-field amorphous state resistance and threshold voltage drift in chalcogenide materials", IEEE Transactions on Electron Devices, vol.51, no.5, May 2004.
12. Executive Summary, 2009 Edition, International Technology Roadmap for Semiconductors.
13. http://cadlab.cs.ucla.edu/∼kirill/.
14. http://www.eecs.berkeley.edu/∼alanmi/abc/.
15. http://www.eecg.utoronto.ca/vpr/.
16. G. Betti-Beneventi et al., "Carbon-doped GeTe Phase-Change Memory featuring remarkable RESET current reduction", European Solid-State Device Research Conference (ESSDERC) 2010.