Laser-induced resistance fine tuning of integrated polysilicon thin-film resistors

IEEE Transactions on Electron Devices

Volumn 58, Issue 2, 2011, Pages 572-575

  Boulais, Etienne ^a   Fantoni, Julie ^a   Chateauneuf, Alexandre ^a,b   Savaria, Yvon ^a   Meunier, Michel ^a  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b MCKINSEY AND COMPANY   (United States)

Author keywords

CMOS process; laser trimming; polysilicon

Indexed keywords

ATOMIC FORCE; CMOS PROCESSS; FINE TUNING; FLUENCES; LASER INDUCED; LASER IRRADIATIONS; LASER TRIMMING; LAYER DEPOSITION; MELTING THRESHOLD; N-DOPED; NANOSECOND LASERS; OPEN LOOPS; POLYSILICON RESISTORS; POLYSILICON STRUCTURES; POLYSILICON THIN FILMS; RESISTANCE VARIATIONS; SEMICONDUCTOR MANUFACTURING; SPECIFIC DESIGN; THIN FILM RESISTORS; TRANSVERSE ELECTROMAGNETIC;

ATOMIC FORCE MICROSCOPY; ATOMIC SPECTROSCOPY; CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; GRAIN BOUNDARIES; POLYSILICON; RAMAN SPECTROSCOPY; RESISTORS; SEMICONDUCTOR LASERS; THIN FILMS; TRIMMING; VAPOR DEPOSITION;

PULSED LASERS;

EID: 79151471365     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2093770     Document Type: Article

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