Reversible circuit synthesis using a cycle-based approach

ACM Journal on Emerging Technologies in Computing Systems

Volumn 6, Issue 4, 2010, Pages

  Saeedi, Mehdi ^a   Saheb Zamani, Morteza ^a   Sedighi, Mehdi ^a   Sasanian, Zahra ^a  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

Circuit optimization; Logic synthesis; Reversible circuits

Indexed keywords

BENCHMARK FUNCTIONS; BUILDING BLOCKES; CIRCUIT OPTIMIZATION; DECOMPOSITION ALGORITHM; DIRECT SYNTHESIS; HYBRID FRAMEWORK; K -CYCLE; LOGIC SYNTHESIS; QUANTUM COMPUTATION; QUANTUM COSTS; REED-MULLER; RESEARCH AREAS; REVERSIBLE CIRCUITS; REVERSIBLE LOGIC; RUNTIMES; SYNTHESIS ALGORITHMS; SYNTHESIS METHOD; TIME COMPLEXITY; WORST CASE SCENARIO;

ALGORITHMS; COMPUTATIONAL LINGUISTICS; COST BENEFIT ANALYSIS; INDUSTRIAL RESEARCH; OPTIMIZATION; QUANTUM COMPUTERS; QUANTUM CRYPTOGRAPHY; SIGNAL PROCESSING; SPECIFICATIONS;

LOGIC CIRCUITS;

EID: 78650676124     PISSN: 15504832     EISSN: 15504840     Source Type: Journal    
DOI: 10.1145/1877745.1877747     Document Type: Article

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