Workload-balancing schedule with adaptive architecture of MPSoCs for fault tolerance

Proceedings - 2010 3rd International Conference on Biomedical Engineering and Informatics, BMEI 2010

Volumn 7, Issue , 2010, Pages 2775-2779

  Zhang, Yuping ^a   Hao, Zimian ^a,b   Xu, Xianbin ^a   Zhao, Wuqing ^a   Wang, Zhuowei ^a  

^a WUHAN UNIVERSITY   (China)

^b Hubei Urban Construction Vocational and Technical College   (China)

Author keywords

Communication cost; Fault tolerance; MPSoC; Task scheduling

Indexed keywords

ADAPTIVE ARCHITECTURE; BUS-BASED; COMMUNICATION COST; EMBEDDED MULTIPROCESSORS; HEURISTIC SCHEDULING; LIST SCHEDULING HEURISTICS; MPSOC; PERFORMANCE EVALUATION; PRECEDENCE GRAPH; PROCESSOR FAILURES; SEMICONDUCTOR TECHNOLOGY; TASK MIGRATION; TASK-SCHEDULING;

BIOMEDICAL ENGINEERING; COMMUNICATION; COSTS; EMBEDDED SYSTEMS; HEURISTIC METHODS; INFORMATION SCIENCE; MULTIPROCESSING SYSTEMS; MULTITASKING; PRODUCT DEVELOPMENT; QUALITY ASSURANCE; SCHEDULING ALGORITHMS; SEMICONDUCTOR DEVICE MANUFACTURE;

FAULT TOLERANCE;

EID: 78650640643     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BMEI.2010.5639847     Document Type: Conference Paper

References (15)

1. W. Wolf, A. A. Jerraya, and G. Martin, "Multiprocessor system-on-chip (mpsoc) technology," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 10, pp. 1701-1713, October 2008.
2. S. Borkar, "Designing reliable systems from unreliable components:the challenges of transistor variability and degradation," IEEE J. Micro, vol. 25, no. 6, pp. 10-16, Nov.-Dec. 2005.
3. A. K. Coskun, T. S. Rosing, K. A. Whisnant, and K. C. Gross, "Temperature-aware mpsoc scheduling for reducing hot spots and gradients," in ASP-DAC '08: Proceedings of the 2008 Asia and South Pacific Design Automation Conference. Los Alamitos, CA, USA: IEEE Computer Society Press, 2008, pp. 49-54.
4. M. Chean and J. A. B. Fortes, "The full-use-of-suitable-spares (fuss) approach to hardware reconfiguration for fault-tolerant processor arrays," IEEE Trans. Comput., vol. 39, no. 4, pp. 564-571, 1990.
5. C.-H. Yang, G. Deconinck, and W.-H. Gui, "Fault-tolerant scheduling for real-time embedded control systems," J. Comput. Sci. Technol., vol. 19, no. 2, pp. 191-202, 2004.
6. C. Yang and A. Orailoglu, "Predictable execution adaptivity through embedding dynamic reconfigurability into static mpsoc schedules," in the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis. ACM, October 2007, pp. 15-20.
7. M. Monchiero, G. Palermo, C. Silvano, and O. Villa, "Exploration of distributed shared memory architectures for noc-based multiprocessors," J. Syst. Archit., vol. 53, no. 10, pp. 719-732, 2007.
8. M. Porrmann, M. Purnaprajna, and C. Puttmann, "Self-optimization of mpsocs targeting resource efficiency and fault tolerance," in AHS '09: Proceedings of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Washington, DC, USA: IEEE Computer Society, 2009, pp. 467-473.
9. S. Ghosh, R. Melhem, and D. Mossé, "Fault-tolerance through scheduling of aperiodic tasks in hard real-time multiprocessor systems," IEEE Trans. on Parallel and Distributed Systems, vol. 8, no. 3, pp. 272-284, December 1997.
10. M. Hosseinabady and J. Nunez-Yanez, "Fault-tolerant dynamically reconfigurable noc-based soc," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, vol. 0, pp. 31-36, 2008.
11. B.Ahmad and Prof.T.Arslan, "Dynamically reconfigurable noc for reconfigurable mpsoc," in IEEE 2005 Custom Integrated Circuits Conference. San Jose,CA: IEEE Computer Society, 2005, pp. 277-280.
12. CoreConnect bus architecture, "http://www-3.ibm.com/chips/techlib. nsf/productfamilies/coreconnect-bus-architecture."
13. AMBA Open Specifications, "http://www.arm.com/."
14. Y.-K. Kwok, I. Ahmad, and J. Gu, "Fast:a low-complexity algorithm for efficient scheduling of dags on parallel processors," in the 1996 International Conference on Parallel Processing, August 1996, pp. 150-157.
15. R. P. Dick, D. L. R. y, and W. Wolf, "Tgff: Task graphs for free," in the 6th international workshop on Hardware/software codesign. IEEE Computer Society, March 1998, pp. 97-101.