Minimum-energy operation via error resiliency

IEEE Embedded Systems Letters

Volumn 2, Issue 4, 2010, Pages 115-118

  Abdallah, Rami A ^a   Shanbhag, Naresh R ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

Algorithmic noise tolerance; error resiliency; subthreshold operation; ultra low power electronics; voltage overscaling

Indexed keywords

CMOS PROCESSS; ENERGY BENEFITS; ERROR RESILIENCY; NOISE TOLERANCE; OPERATING POINTS; SUB-THRESHOLD DESIGN; SUBTHRESHOLD ENERGY; SUBTHRESHOLD OPERATION; TIMING ERRORS; TOTAL ENERGY; VOLTAGE OVERSCALING; VOLTAGE VARIATION;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; THRESHOLD ELEMENTS;

POWER ELECTRONICS;

EID: 78650639193     PISSN: 19430663     EISSN: None     Source Type: Journal    
DOI: 10.1109/LES.2010.2098330     Document Type: Article

References (9)

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