Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines

Proceedings of the 8th IEEE International NEWCAS Conference, NEWCAS2010

Volumn , Issue , 2010, Pages 73-76

  Makino, Hiroshi ^a   Kusumoto, Takahito ^b   Nakata, Shunji ^c   Mutoh, Shin'ichiro ^c   Miyama, Masayuki ^b   Yoshimura, Tsutomu ^a   Iwade, Shuhei ^a   Matsuda, Yoshio ^b  

^a OSAKA INSTITUTE OF TECHNOLOGY   (Japan)

^b KANAZAWA UNIVERSITY   (Japan)

^c NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

65NM TECHNOLOGY; CHANNEL LENGTH MODULATION; CONVENTIONAL CIRCUITS; DYNAMIC VOLTAGE; DYNAMIC VOLTAGE CONTROL; GROUND LINES; MEMORY CELL; NOISE MARGINS; OPERATING MARGINS; READ MARGIN; SUPPLY VOLTAGES; WRITE OPERATIONS;

ELECTRIC POTENTIAL; VOLTAGE REGULATORS;

STATIC RANDOM ACCESS STORAGE;

EID: 78349242866     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NEWCAS.2010.5603927     Document Type: Conference Paper

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